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c3d1f1746b
* 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus: (150 commits) MIPS: PowerTV: Separate PowerTV USB support from non-USB code MIPS: strip the un-needed sections of vmlinuz MIPS: Clean up the calculation of VMLINUZ_LOAD_ADDRESS MIPS: Clean up arch/mips/boot/compressed/decompress.c MIPS: Clean up arch/mips/boot/compressed/ld.script MIPS: Unify the suffix of compressed vmlinux.bin MIPS: PowerTV: Add Gaia platform definitions. MIPS: BCM47xx: Fix nvram_getenv return value. MIPS: Octeon: Allow more than 3.75GB of memory with PCIe MIPS: Clean up notify_die() usage. MIPS: Remove unused task_struct.trap_no field. Documentation: Mention that KProbes is supported on MIPS SAMPLES: kprobe_example: Make it print something on MIPS. MIPS: kprobe: Add support. MIPS: Add instrunction format for BREAK and SYSCALL MIPS: kprobes: Define regs_return_value() MIPS: Ritually kill stupid printk. MIPS: Octeon: Disallow MSI-X interrupt and fall back to MSI interrupts. MIPS: Octeon: Support 256 MSI on PCIe MIPS: Decode core number for R2 CPUs. ...
1292 lines
32 KiB
C
1292 lines
32 KiB
C
/*
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*
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* Alchemy Au1x00 ethernet driver
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*
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* Copyright 2001-2003, 2006 MontaVista Software Inc.
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* Copyright 2002 TimeSys Corp.
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* Added ethtool/mii-tool support,
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* Copyright 2004 Matt Porter <mporter@kernel.crashing.org>
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* Update: 2004 Bjoern Riemer, riemer@fokus.fraunhofer.de
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* or riemer@riemer-nt.de: fixed the link beat detection with
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* ioctls (SIOCGMIIPHY)
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* Copyright 2006 Herbert Valerio Riedel <hvr@gnu.org>
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* converted to use linux-2.6.x's PHY framework
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*
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* Author: MontaVista Software, Inc.
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* ppopov@mvista.com or source@mvista.com
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*
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* ########################################################################
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*
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* This program is free software; you can distribute it and/or modify it
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* under the terms of the GNU General Public License (Version 2) as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
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*
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* ########################################################################
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*
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*
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*/
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#include <linux/capability.h>
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#include <linux/dma-mapping.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/string.h>
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#include <linux/timer.h>
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#include <linux/errno.h>
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#include <linux/in.h>
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#include <linux/ioport.h>
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#include <linux/bitops.h>
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#include <linux/slab.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/ethtool.h>
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#include <linux/mii.h>
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#include <linux/skbuff.h>
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#include <linux/delay.h>
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#include <linux/crc32.h>
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#include <linux/phy.h>
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#include <linux/platform_device.h>
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#include <asm/cpu.h>
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#include <asm/mipsregs.h>
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#include <asm/irq.h>
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#include <asm/io.h>
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#include <asm/processor.h>
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#include <au1000.h>
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#include <au1xxx_eth.h>
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#include <prom.h>
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#include "au1000_eth.h"
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#ifdef AU1000_ETH_DEBUG
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static int au1000_debug = 5;
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#else
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static int au1000_debug = 3;
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#endif
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#define AU1000_DEF_MSG_ENABLE (NETIF_MSG_DRV | \
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NETIF_MSG_PROBE | \
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NETIF_MSG_LINK)
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#define DRV_NAME "au1000_eth"
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#define DRV_VERSION "1.7"
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#define DRV_AUTHOR "Pete Popov <ppopov@embeddedalley.com>"
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#define DRV_DESC "Au1xxx on-chip Ethernet driver"
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MODULE_AUTHOR(DRV_AUTHOR);
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MODULE_DESCRIPTION(DRV_DESC);
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MODULE_LICENSE("GPL");
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MODULE_VERSION(DRV_VERSION);
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/*
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* Theory of operation
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*
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* The Au1000 MACs use a simple rx and tx descriptor ring scheme.
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* There are four receive and four transmit descriptors. These
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* descriptors are not in memory; rather, they are just a set of
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* hardware registers.
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*
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* Since the Au1000 has a coherent data cache, the receive and
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* transmit buffers are allocated from the KSEG0 segment. The
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* hardware registers, however, are still mapped at KSEG1 to
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* make sure there's no out-of-order writes, and that all writes
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* complete immediately.
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*/
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struct au1000_private *au_macs[NUM_ETH_INTERFACES];
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/*
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* board-specific configurations
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*
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* PHY detection algorithm
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*
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* If phy_static_config is undefined, the PHY setup is
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* autodetected:
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*
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* mii_probe() first searches the current MAC's MII bus for a PHY,
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* selecting the first (or last, if phy_search_highest_addr is
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* defined) PHY address not already claimed by another netdev.
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*
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* If nothing was found that way when searching for the 2nd ethernet
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* controller's PHY and phy1_search_mac0 is defined, then
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* the first MII bus is searched as well for an unclaimed PHY; this is
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* needed in case of a dual-PHY accessible only through the MAC0's MII
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* bus.
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*
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* Finally, if no PHY is found, then the corresponding ethernet
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* controller is not registered to the network subsystem.
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*/
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/* autodetection defaults: phy1_search_mac0 */
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/* static PHY setup
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*
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* most boards PHY setup should be detectable properly with the
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* autodetection algorithm in mii_probe(), but in some cases (e.g. if
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* you have a switch attached, or want to use the PHY's interrupt
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* notification capabilities) you can provide a static PHY
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* configuration here
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*
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* IRQs may only be set, if a PHY address was configured
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* If a PHY address is given, also a bus id is required to be set
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*
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* ps: make sure the used irqs are configured properly in the board
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* specific irq-map
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*/
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static void au1000_enable_mac(struct net_device *dev, int force_reset)
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{
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unsigned long flags;
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struct au1000_private *aup = netdev_priv(dev);
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spin_lock_irqsave(&aup->lock, flags);
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if(force_reset || (!aup->mac_enabled)) {
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*aup->enable = MAC_EN_CLOCK_ENABLE;
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au_sync_delay(2);
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*aup->enable = (MAC_EN_RESET0 | MAC_EN_RESET1 | MAC_EN_RESET2
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| MAC_EN_CLOCK_ENABLE);
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au_sync_delay(2);
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aup->mac_enabled = 1;
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}
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spin_unlock_irqrestore(&aup->lock, flags);
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}
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/*
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* MII operations
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*/
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static int au1000_mdio_read(struct net_device *dev, int phy_addr, int reg)
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{
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struct au1000_private *aup = netdev_priv(dev);
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volatile u32 *const mii_control_reg = &aup->mac->mii_control;
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volatile u32 *const mii_data_reg = &aup->mac->mii_data;
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u32 timedout = 20;
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u32 mii_control;
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while (*mii_control_reg & MAC_MII_BUSY) {
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mdelay(1);
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if (--timedout == 0) {
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netdev_err(dev, "read_MII busy timeout!!\n");
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return -1;
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}
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}
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mii_control = MAC_SET_MII_SELECT_REG(reg) |
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MAC_SET_MII_SELECT_PHY(phy_addr) | MAC_MII_READ;
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*mii_control_reg = mii_control;
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timedout = 20;
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while (*mii_control_reg & MAC_MII_BUSY) {
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mdelay(1);
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if (--timedout == 0) {
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netdev_err(dev, "mdio_read busy timeout!!\n");
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return -1;
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}
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}
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return (int)*mii_data_reg;
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}
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static void au1000_mdio_write(struct net_device *dev, int phy_addr,
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int reg, u16 value)
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{
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struct au1000_private *aup = netdev_priv(dev);
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volatile u32 *const mii_control_reg = &aup->mac->mii_control;
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volatile u32 *const mii_data_reg = &aup->mac->mii_data;
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u32 timedout = 20;
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u32 mii_control;
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while (*mii_control_reg & MAC_MII_BUSY) {
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mdelay(1);
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if (--timedout == 0) {
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netdev_err(dev, "mdio_write busy timeout!!\n");
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return;
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}
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}
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mii_control = MAC_SET_MII_SELECT_REG(reg) |
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MAC_SET_MII_SELECT_PHY(phy_addr) | MAC_MII_WRITE;
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*mii_data_reg = value;
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*mii_control_reg = mii_control;
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}
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static int au1000_mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum)
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{
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/* WARNING: bus->phy_map[phy_addr].attached_dev == dev does
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* _NOT_ hold (e.g. when PHY is accessed through other MAC's MII bus) */
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struct net_device *const dev = bus->priv;
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au1000_enable_mac(dev, 0); /* make sure the MAC associated with this
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* mii_bus is enabled */
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return au1000_mdio_read(dev, phy_addr, regnum);
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}
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static int au1000_mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum,
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u16 value)
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{
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struct net_device *const dev = bus->priv;
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au1000_enable_mac(dev, 0); /* make sure the MAC associated with this
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* mii_bus is enabled */
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au1000_mdio_write(dev, phy_addr, regnum, value);
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return 0;
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}
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static int au1000_mdiobus_reset(struct mii_bus *bus)
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{
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struct net_device *const dev = bus->priv;
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au1000_enable_mac(dev, 0); /* make sure the MAC associated with this
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* mii_bus is enabled */
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return 0;
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}
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static void au1000_hard_stop(struct net_device *dev)
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{
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struct au1000_private *aup = netdev_priv(dev);
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netif_dbg(aup, drv, dev, "hard stop\n");
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aup->mac->control &= ~(MAC_RX_ENABLE | MAC_TX_ENABLE);
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au_sync_delay(10);
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}
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static void au1000_enable_rx_tx(struct net_device *dev)
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{
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struct au1000_private *aup = netdev_priv(dev);
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netif_dbg(aup, hw, dev, "enable_rx_tx\n");
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aup->mac->control |= (MAC_RX_ENABLE | MAC_TX_ENABLE);
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au_sync_delay(10);
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}
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static void
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au1000_adjust_link(struct net_device *dev)
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{
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struct au1000_private *aup = netdev_priv(dev);
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struct phy_device *phydev = aup->phy_dev;
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unsigned long flags;
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int status_change = 0;
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BUG_ON(!aup->phy_dev);
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spin_lock_irqsave(&aup->lock, flags);
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if (phydev->link && (aup->old_speed != phydev->speed)) {
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/* speed changed */
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switch (phydev->speed) {
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case SPEED_10:
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case SPEED_100:
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break;
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default:
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netdev_warn(dev, "Speed (%d) is not 10/100 ???\n",
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phydev->speed);
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break;
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}
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aup->old_speed = phydev->speed;
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status_change = 1;
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}
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if (phydev->link && (aup->old_duplex != phydev->duplex)) {
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/* duplex mode changed */
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/* switching duplex mode requires to disable rx and tx! */
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au1000_hard_stop(dev);
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if (DUPLEX_FULL == phydev->duplex)
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aup->mac->control = ((aup->mac->control
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| MAC_FULL_DUPLEX)
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& ~MAC_DISABLE_RX_OWN);
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else
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aup->mac->control = ((aup->mac->control
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& ~MAC_FULL_DUPLEX)
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| MAC_DISABLE_RX_OWN);
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au_sync_delay(1);
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au1000_enable_rx_tx(dev);
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aup->old_duplex = phydev->duplex;
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status_change = 1;
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}
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if (phydev->link != aup->old_link) {
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/* link state changed */
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if (!phydev->link) {
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/* link went down */
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aup->old_speed = 0;
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aup->old_duplex = -1;
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}
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aup->old_link = phydev->link;
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status_change = 1;
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}
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spin_unlock_irqrestore(&aup->lock, flags);
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if (status_change) {
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if (phydev->link)
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netdev_info(dev, "link up (%d/%s)\n",
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phydev->speed,
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DUPLEX_FULL == phydev->duplex ? "Full" : "Half");
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else
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netdev_info(dev, "link down\n");
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}
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}
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static int au1000_mii_probe (struct net_device *dev)
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{
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struct au1000_private *const aup = netdev_priv(dev);
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struct phy_device *phydev = NULL;
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if (aup->phy_static_config) {
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BUG_ON(aup->mac_id < 0 || aup->mac_id > 1);
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if (aup->phy_addr)
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phydev = aup->mii_bus->phy_map[aup->phy_addr];
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else
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netdev_info(dev, "using PHY-less setup\n");
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return 0;
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} else {
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int phy_addr;
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/* find the first (lowest address) PHY on the current MAC's MII bus */
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for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++)
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if (aup->mii_bus->phy_map[phy_addr]) {
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phydev = aup->mii_bus->phy_map[phy_addr];
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if (!aup->phy_search_highest_addr)
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break; /* break out with first one found */
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}
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if (aup->phy1_search_mac0) {
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/* try harder to find a PHY */
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if (!phydev && (aup->mac_id == 1)) {
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/* no PHY found, maybe we have a dual PHY? */
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dev_info(&dev->dev, ": no PHY found on MAC1, "
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"let's see if it's attached to MAC0...\n");
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/* find the first (lowest address) non-attached PHY on
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* the MAC0 MII bus */
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for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) {
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struct phy_device *const tmp_phydev =
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aup->mii_bus->phy_map[phy_addr];
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if (aup->mac_id == 1)
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break;
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if (!tmp_phydev)
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continue; /* no PHY here... */
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if (tmp_phydev->attached_dev)
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continue; /* already claimed by MAC0 */
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phydev = tmp_phydev;
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break; /* found it */
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}
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}
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}
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}
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if (!phydev) {
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netdev_err(dev, "no PHY found\n");
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return -1;
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}
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|
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/* now we are supposed to have a proper phydev, to attach to... */
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BUG_ON(phydev->attached_dev);
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|
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phydev = phy_connect(dev, dev_name(&phydev->dev), &au1000_adjust_link,
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0, PHY_INTERFACE_MODE_MII);
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if (IS_ERR(phydev)) {
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netdev_err(dev, "Could not attach to PHY\n");
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return PTR_ERR(phydev);
|
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}
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|
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/* mask with MAC supported features */
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phydev->supported &= (SUPPORTED_10baseT_Half
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| SUPPORTED_10baseT_Full
|
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| SUPPORTED_100baseT_Half
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| SUPPORTED_100baseT_Full
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| SUPPORTED_Autoneg
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/* | SUPPORTED_Pause | SUPPORTED_Asym_Pause */
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| SUPPORTED_MII
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| SUPPORTED_TP);
|
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|
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phydev->advertising = phydev->supported;
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|
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aup->old_link = 0;
|
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aup->old_speed = 0;
|
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aup->old_duplex = -1;
|
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aup->phy_dev = phydev;
|
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|
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netdev_info(dev, "attached PHY driver [%s] "
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"(mii_bus:phy_addr=%s, irq=%d)\n",
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phydev->drv->name, dev_name(&phydev->dev), phydev->irq);
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|
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return 0;
|
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}
|
|
|
|
|
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/*
|
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* Buffer allocation/deallocation routines. The buffer descriptor returned
|
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* has the virtual and dma address of a buffer suitable for
|
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* both, receive and transmit operations.
|
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*/
|
|
static db_dest_t *au1000_GetFreeDB(struct au1000_private *aup)
|
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{
|
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db_dest_t *pDB;
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pDB = aup->pDBfree;
|
|
|
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if (pDB) {
|
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aup->pDBfree = pDB->pnext;
|
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}
|
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return pDB;
|
|
}
|
|
|
|
void au1000_ReleaseDB(struct au1000_private *aup, db_dest_t *pDB)
|
|
{
|
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db_dest_t *pDBfree = aup->pDBfree;
|
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if (pDBfree)
|
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pDBfree->pnext = pDB;
|
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aup->pDBfree = pDB;
|
|
}
|
|
|
|
static void au1000_reset_mac_unlocked(struct net_device *dev)
|
|
{
|
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struct au1000_private *const aup = netdev_priv(dev);
|
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int i;
|
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|
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au1000_hard_stop(dev);
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|
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*aup->enable = MAC_EN_CLOCK_ENABLE;
|
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au_sync_delay(2);
|
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*aup->enable = 0;
|
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au_sync_delay(2);
|
|
|
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aup->tx_full = 0;
|
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for (i = 0; i < NUM_RX_DMA; i++) {
|
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/* reset control bits */
|
|
aup->rx_dma_ring[i]->buff_stat &= ~0xf;
|
|
}
|
|
for (i = 0; i < NUM_TX_DMA; i++) {
|
|
/* reset control bits */
|
|
aup->tx_dma_ring[i]->buff_stat &= ~0xf;
|
|
}
|
|
|
|
aup->mac_enabled = 0;
|
|
|
|
}
|
|
|
|
static void au1000_reset_mac(struct net_device *dev)
|
|
{
|
|
struct au1000_private *const aup = netdev_priv(dev);
|
|
unsigned long flags;
|
|
|
|
netif_dbg(aup, hw, dev, "reset mac, aup %x\n",
|
|
(unsigned)aup);
|
|
|
|
spin_lock_irqsave(&aup->lock, flags);
|
|
|
|
au1000_reset_mac_unlocked (dev);
|
|
|
|
spin_unlock_irqrestore(&aup->lock, flags);
|
|
}
|
|
|
|
/*
|
|
* Setup the receive and transmit "rings". These pointers are the addresses
|
|
* of the rx and tx MAC DMA registers so they are fixed by the hardware --
|
|
* these are not descriptors sitting in memory.
|
|
*/
|
|
static void
|
|
au1000_setup_hw_rings(struct au1000_private *aup, u32 rx_base, u32 tx_base)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < NUM_RX_DMA; i++) {
|
|
aup->rx_dma_ring[i] =
|
|
(volatile rx_dma_t *) (rx_base + sizeof(rx_dma_t)*i);
|
|
}
|
|
for (i = 0; i < NUM_TX_DMA; i++) {
|
|
aup->tx_dma_ring[i] =
|
|
(volatile tx_dma_t *) (tx_base + sizeof(tx_dma_t)*i);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* ethtool operations
|
|
*/
|
|
|
|
static int au1000_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
|
|
{
|
|
struct au1000_private *aup = netdev_priv(dev);
|
|
|
|
if (aup->phy_dev)
|
|
return phy_ethtool_gset(aup->phy_dev, cmd);
|
|
|
|
return -EINVAL;
|
|
}
|
|
|
|
static int au1000_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
|
|
{
|
|
struct au1000_private *aup = netdev_priv(dev);
|
|
|
|
if (!capable(CAP_NET_ADMIN))
|
|
return -EPERM;
|
|
|
|
if (aup->phy_dev)
|
|
return phy_ethtool_sset(aup->phy_dev, cmd);
|
|
|
|
return -EINVAL;
|
|
}
|
|
|
|
static void
|
|
au1000_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
|
|
{
|
|
struct au1000_private *aup = netdev_priv(dev);
|
|
|
|
strcpy(info->driver, DRV_NAME);
|
|
strcpy(info->version, DRV_VERSION);
|
|
info->fw_version[0] = '\0';
|
|
sprintf(info->bus_info, "%s %d", DRV_NAME, aup->mac_id);
|
|
info->regdump_len = 0;
|
|
}
|
|
|
|
static void au1000_set_msglevel(struct net_device *dev, u32 value)
|
|
{
|
|
struct au1000_private *aup = netdev_priv(dev);
|
|
aup->msg_enable = value;
|
|
}
|
|
|
|
static u32 au1000_get_msglevel(struct net_device *dev)
|
|
{
|
|
struct au1000_private *aup = netdev_priv(dev);
|
|
return aup->msg_enable;
|
|
}
|
|
|
|
static const struct ethtool_ops au1000_ethtool_ops = {
|
|
.get_settings = au1000_get_settings,
|
|
.set_settings = au1000_set_settings,
|
|
.get_drvinfo = au1000_get_drvinfo,
|
|
.get_link = ethtool_op_get_link,
|
|
.get_msglevel = au1000_get_msglevel,
|
|
.set_msglevel = au1000_set_msglevel,
|
|
};
|
|
|
|
|
|
/*
|
|
* Initialize the interface.
|
|
*
|
|
* When the device powers up, the clocks are disabled and the
|
|
* mac is in reset state. When the interface is closed, we
|
|
* do the same -- reset the device and disable the clocks to
|
|
* conserve power. Thus, whenever au1000_init() is called,
|
|
* the device should already be in reset state.
|
|
*/
|
|
static int au1000_init(struct net_device *dev)
|
|
{
|
|
struct au1000_private *aup = netdev_priv(dev);
|
|
unsigned long flags;
|
|
int i;
|
|
u32 control;
|
|
|
|
netif_dbg(aup, hw, dev, "au1000_init\n");
|
|
|
|
/* bring the device out of reset */
|
|
au1000_enable_mac(dev, 1);
|
|
|
|
spin_lock_irqsave(&aup->lock, flags);
|
|
|
|
aup->mac->control = 0;
|
|
aup->tx_head = (aup->tx_dma_ring[0]->buff_stat & 0xC) >> 2;
|
|
aup->tx_tail = aup->tx_head;
|
|
aup->rx_head = (aup->rx_dma_ring[0]->buff_stat & 0xC) >> 2;
|
|
|
|
aup->mac->mac_addr_high = dev->dev_addr[5]<<8 | dev->dev_addr[4];
|
|
aup->mac->mac_addr_low = dev->dev_addr[3]<<24 | dev->dev_addr[2]<<16 |
|
|
dev->dev_addr[1]<<8 | dev->dev_addr[0];
|
|
|
|
for (i = 0; i < NUM_RX_DMA; i++) {
|
|
aup->rx_dma_ring[i]->buff_stat |= RX_DMA_ENABLE;
|
|
}
|
|
au_sync();
|
|
|
|
control = MAC_RX_ENABLE | MAC_TX_ENABLE;
|
|
#ifndef CONFIG_CPU_LITTLE_ENDIAN
|
|
control |= MAC_BIG_ENDIAN;
|
|
#endif
|
|
if (aup->phy_dev) {
|
|
if (aup->phy_dev->link && (DUPLEX_FULL == aup->phy_dev->duplex))
|
|
control |= MAC_FULL_DUPLEX;
|
|
else
|
|
control |= MAC_DISABLE_RX_OWN;
|
|
} else { /* PHY-less op, assume full-duplex */
|
|
control |= MAC_FULL_DUPLEX;
|
|
}
|
|
|
|
aup->mac->control = control;
|
|
aup->mac->vlan1_tag = 0x8100; /* activate vlan support */
|
|
au_sync();
|
|
|
|
spin_unlock_irqrestore(&aup->lock, flags);
|
|
return 0;
|
|
}
|
|
|
|
static inline void au1000_update_rx_stats(struct net_device *dev, u32 status)
|
|
{
|
|
struct net_device_stats *ps = &dev->stats;
|
|
|
|
ps->rx_packets++;
|
|
if (status & RX_MCAST_FRAME)
|
|
ps->multicast++;
|
|
|
|
if (status & RX_ERROR) {
|
|
ps->rx_errors++;
|
|
if (status & RX_MISSED_FRAME)
|
|
ps->rx_missed_errors++;
|
|
if (status & (RX_OVERLEN | RX_RUNT | RX_LEN_ERROR))
|
|
ps->rx_length_errors++;
|
|
if (status & RX_CRC_ERROR)
|
|
ps->rx_crc_errors++;
|
|
if (status & RX_COLL)
|
|
ps->collisions++;
|
|
} else
|
|
ps->rx_bytes += status & RX_FRAME_LEN_MASK;
|
|
|
|
}
|
|
|
|
/*
|
|
* Au1000 receive routine.
|
|
*/
|
|
static int au1000_rx(struct net_device *dev)
|
|
{
|
|
struct au1000_private *aup = netdev_priv(dev);
|
|
struct sk_buff *skb;
|
|
volatile rx_dma_t *prxd;
|
|
u32 buff_stat, status;
|
|
db_dest_t *pDB;
|
|
u32 frmlen;
|
|
|
|
netif_dbg(aup, rx_status, dev, "au1000_rx head %d\n", aup->rx_head);
|
|
|
|
prxd = aup->rx_dma_ring[aup->rx_head];
|
|
buff_stat = prxd->buff_stat;
|
|
while (buff_stat & RX_T_DONE) {
|
|
status = prxd->status;
|
|
pDB = aup->rx_db_inuse[aup->rx_head];
|
|
au1000_update_rx_stats(dev, status);
|
|
if (!(status & RX_ERROR)) {
|
|
|
|
/* good frame */
|
|
frmlen = (status & RX_FRAME_LEN_MASK);
|
|
frmlen -= 4; /* Remove FCS */
|
|
skb = dev_alloc_skb(frmlen + 2);
|
|
if (skb == NULL) {
|
|
netdev_err(dev, "Memory squeeze, dropping packet.\n");
|
|
dev->stats.rx_dropped++;
|
|
continue;
|
|
}
|
|
skb_reserve(skb, 2); /* 16 byte IP header align */
|
|
skb_copy_to_linear_data(skb,
|
|
(unsigned char *)pDB->vaddr, frmlen);
|
|
skb_put(skb, frmlen);
|
|
skb->protocol = eth_type_trans(skb, dev);
|
|
netif_rx(skb); /* pass the packet to upper layers */
|
|
} else {
|
|
if (au1000_debug > 4) {
|
|
if (status & RX_MISSED_FRAME)
|
|
printk("rx miss\n");
|
|
if (status & RX_WDOG_TIMER)
|
|
printk("rx wdog\n");
|
|
if (status & RX_RUNT)
|
|
printk("rx runt\n");
|
|
if (status & RX_OVERLEN)
|
|
printk("rx overlen\n");
|
|
if (status & RX_COLL)
|
|
printk("rx coll\n");
|
|
if (status & RX_MII_ERROR)
|
|
printk("rx mii error\n");
|
|
if (status & RX_CRC_ERROR)
|
|
printk("rx crc error\n");
|
|
if (status & RX_LEN_ERROR)
|
|
printk("rx len error\n");
|
|
if (status & RX_U_CNTRL_FRAME)
|
|
printk("rx u control frame\n");
|
|
}
|
|
}
|
|
prxd->buff_stat = (u32)(pDB->dma_addr | RX_DMA_ENABLE);
|
|
aup->rx_head = (aup->rx_head + 1) & (NUM_RX_DMA - 1);
|
|
au_sync();
|
|
|
|
/* next descriptor */
|
|
prxd = aup->rx_dma_ring[aup->rx_head];
|
|
buff_stat = prxd->buff_stat;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static void au1000_update_tx_stats(struct net_device *dev, u32 status)
|
|
{
|
|
struct au1000_private *aup = netdev_priv(dev);
|
|
struct net_device_stats *ps = &dev->stats;
|
|
|
|
if (status & TX_FRAME_ABORTED) {
|
|
if (!aup->phy_dev || (DUPLEX_FULL == aup->phy_dev->duplex)) {
|
|
if (status & (TX_JAB_TIMEOUT | TX_UNDERRUN)) {
|
|
/* any other tx errors are only valid
|
|
* in half duplex mode */
|
|
ps->tx_errors++;
|
|
ps->tx_aborted_errors++;
|
|
}
|
|
} else {
|
|
ps->tx_errors++;
|
|
ps->tx_aborted_errors++;
|
|
if (status & (TX_NO_CARRIER | TX_LOSS_CARRIER))
|
|
ps->tx_carrier_errors++;
|
|
}
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Called from the interrupt service routine to acknowledge
|
|
* the TX DONE bits. This is a must if the irq is setup as
|
|
* edge triggered.
|
|
*/
|
|
static void au1000_tx_ack(struct net_device *dev)
|
|
{
|
|
struct au1000_private *aup = netdev_priv(dev);
|
|
volatile tx_dma_t *ptxd;
|
|
|
|
ptxd = aup->tx_dma_ring[aup->tx_tail];
|
|
|
|
while (ptxd->buff_stat & TX_T_DONE) {
|
|
au1000_update_tx_stats(dev, ptxd->status);
|
|
ptxd->buff_stat &= ~TX_T_DONE;
|
|
ptxd->len = 0;
|
|
au_sync();
|
|
|
|
aup->tx_tail = (aup->tx_tail + 1) & (NUM_TX_DMA - 1);
|
|
ptxd = aup->tx_dma_ring[aup->tx_tail];
|
|
|
|
if (aup->tx_full) {
|
|
aup->tx_full = 0;
|
|
netif_wake_queue(dev);
|
|
}
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Au1000 interrupt service routine.
|
|
*/
|
|
static irqreturn_t au1000_interrupt(int irq, void *dev_id)
|
|
{
|
|
struct net_device *dev = dev_id;
|
|
|
|
/* Handle RX interrupts first to minimize chance of overrun */
|
|
|
|
au1000_rx(dev);
|
|
au1000_tx_ack(dev);
|
|
return IRQ_RETVAL(1);
|
|
}
|
|
|
|
static int au1000_open(struct net_device *dev)
|
|
{
|
|
int retval;
|
|
struct au1000_private *aup = netdev_priv(dev);
|
|
|
|
netif_dbg(aup, drv, dev, "open: dev=%p\n", dev);
|
|
|
|
retval = request_irq(dev->irq, au1000_interrupt, 0,
|
|
dev->name, dev);
|
|
if (retval) {
|
|
netdev_err(dev, "unable to get IRQ %d\n", dev->irq);
|
|
return retval;
|
|
}
|
|
|
|
retval = au1000_init(dev);
|
|
if (retval) {
|
|
netdev_err(dev, "error in au1000_init\n");
|
|
free_irq(dev->irq, dev);
|
|
return retval;
|
|
}
|
|
|
|
if (aup->phy_dev) {
|
|
/* cause the PHY state machine to schedule a link state check */
|
|
aup->phy_dev->state = PHY_CHANGELINK;
|
|
phy_start(aup->phy_dev);
|
|
}
|
|
|
|
netif_start_queue(dev);
|
|
|
|
netif_dbg(aup, drv, dev, "open: Initialization done.\n");
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int au1000_close(struct net_device *dev)
|
|
{
|
|
unsigned long flags;
|
|
struct au1000_private *const aup = netdev_priv(dev);
|
|
|
|
netif_dbg(aup, drv, dev, "close: dev=%p\n", dev);
|
|
|
|
if (aup->phy_dev)
|
|
phy_stop(aup->phy_dev);
|
|
|
|
spin_lock_irqsave(&aup->lock, flags);
|
|
|
|
au1000_reset_mac_unlocked (dev);
|
|
|
|
/* stop the device */
|
|
netif_stop_queue(dev);
|
|
|
|
/* disable the interrupt */
|
|
free_irq(dev->irq, dev);
|
|
spin_unlock_irqrestore(&aup->lock, flags);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Au1000 transmit routine.
|
|
*/
|
|
static netdev_tx_t au1000_tx(struct sk_buff *skb, struct net_device *dev)
|
|
{
|
|
struct au1000_private *aup = netdev_priv(dev);
|
|
struct net_device_stats *ps = &dev->stats;
|
|
volatile tx_dma_t *ptxd;
|
|
u32 buff_stat;
|
|
db_dest_t *pDB;
|
|
int i;
|
|
|
|
netif_dbg(aup, tx_queued, dev, "tx: aup %x len=%d, data=%p, head %d\n",
|
|
(unsigned)aup, skb->len,
|
|
skb->data, aup->tx_head);
|
|
|
|
ptxd = aup->tx_dma_ring[aup->tx_head];
|
|
buff_stat = ptxd->buff_stat;
|
|
if (buff_stat & TX_DMA_ENABLE) {
|
|
/* We've wrapped around and the transmitter is still busy */
|
|
netif_stop_queue(dev);
|
|
aup->tx_full = 1;
|
|
return NETDEV_TX_BUSY;
|
|
} else if (buff_stat & TX_T_DONE) {
|
|
au1000_update_tx_stats(dev, ptxd->status);
|
|
ptxd->len = 0;
|
|
}
|
|
|
|
if (aup->tx_full) {
|
|
aup->tx_full = 0;
|
|
netif_wake_queue(dev);
|
|
}
|
|
|
|
pDB = aup->tx_db_inuse[aup->tx_head];
|
|
skb_copy_from_linear_data(skb, (void *)pDB->vaddr, skb->len);
|
|
if (skb->len < ETH_ZLEN) {
|
|
for (i = skb->len; i < ETH_ZLEN; i++) {
|
|
((char *)pDB->vaddr)[i] = 0;
|
|
}
|
|
ptxd->len = ETH_ZLEN;
|
|
} else
|
|
ptxd->len = skb->len;
|
|
|
|
ps->tx_packets++;
|
|
ps->tx_bytes += ptxd->len;
|
|
|
|
ptxd->buff_stat = pDB->dma_addr | TX_DMA_ENABLE;
|
|
au_sync();
|
|
dev_kfree_skb(skb);
|
|
aup->tx_head = (aup->tx_head + 1) & (NUM_TX_DMA - 1);
|
|
return NETDEV_TX_OK;
|
|
}
|
|
|
|
/*
|
|
* The Tx ring has been full longer than the watchdog timeout
|
|
* value. The transmitter must be hung?
|
|
*/
|
|
static void au1000_tx_timeout(struct net_device *dev)
|
|
{
|
|
netdev_err(dev, "au1000_tx_timeout: dev=%p\n", dev);
|
|
au1000_reset_mac(dev);
|
|
au1000_init(dev);
|
|
dev->trans_start = jiffies; /* prevent tx timeout */
|
|
netif_wake_queue(dev);
|
|
}
|
|
|
|
static void au1000_multicast_list(struct net_device *dev)
|
|
{
|
|
struct au1000_private *aup = netdev_priv(dev);
|
|
|
|
netif_dbg(aup, drv, dev, "au1000_multicast_list: flags=%x\n", dev->flags);
|
|
|
|
if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
|
|
aup->mac->control |= MAC_PROMISCUOUS;
|
|
} else if ((dev->flags & IFF_ALLMULTI) ||
|
|
netdev_mc_count(dev) > MULTICAST_FILTER_LIMIT) {
|
|
aup->mac->control |= MAC_PASS_ALL_MULTI;
|
|
aup->mac->control &= ~MAC_PROMISCUOUS;
|
|
netdev_info(dev, "Pass all multicast\n");
|
|
} else {
|
|
struct netdev_hw_addr *ha;
|
|
u32 mc_filter[2]; /* Multicast hash filter */
|
|
|
|
mc_filter[1] = mc_filter[0] = 0;
|
|
netdev_for_each_mc_addr(ha, dev)
|
|
set_bit(ether_crc(ETH_ALEN, ha->addr)>>26,
|
|
(long *)mc_filter);
|
|
aup->mac->multi_hash_high = mc_filter[1];
|
|
aup->mac->multi_hash_low = mc_filter[0];
|
|
aup->mac->control &= ~MAC_PROMISCUOUS;
|
|
aup->mac->control |= MAC_HASH_MODE;
|
|
}
|
|
}
|
|
|
|
static int au1000_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
|
|
{
|
|
struct au1000_private *aup = netdev_priv(dev);
|
|
|
|
if (!netif_running(dev))
|
|
return -EINVAL;
|
|
|
|
if (!aup->phy_dev)
|
|
return -EINVAL; /* PHY not controllable */
|
|
|
|
return phy_mii_ioctl(aup->phy_dev, rq, cmd);
|
|
}
|
|
|
|
static const struct net_device_ops au1000_netdev_ops = {
|
|
.ndo_open = au1000_open,
|
|
.ndo_stop = au1000_close,
|
|
.ndo_start_xmit = au1000_tx,
|
|
.ndo_set_multicast_list = au1000_multicast_list,
|
|
.ndo_do_ioctl = au1000_ioctl,
|
|
.ndo_tx_timeout = au1000_tx_timeout,
|
|
.ndo_set_mac_address = eth_mac_addr,
|
|
.ndo_validate_addr = eth_validate_addr,
|
|
.ndo_change_mtu = eth_change_mtu,
|
|
};
|
|
|
|
static int __devinit au1000_probe(struct platform_device *pdev)
|
|
{
|
|
static unsigned version_printed;
|
|
struct au1000_private *aup = NULL;
|
|
struct au1000_eth_platform_data *pd;
|
|
struct net_device *dev = NULL;
|
|
db_dest_t *pDB, *pDBfree;
|
|
int irq, i, err = 0;
|
|
struct resource *base, *macen;
|
|
|
|
base = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
if (!base) {
|
|
dev_err(&pdev->dev, "failed to retrieve base register\n");
|
|
err = -ENODEV;
|
|
goto out;
|
|
}
|
|
|
|
macen = platform_get_resource(pdev, IORESOURCE_MEM, 1);
|
|
if (!macen) {
|
|
dev_err(&pdev->dev, "failed to retrieve MAC Enable register\n");
|
|
err = -ENODEV;
|
|
goto out;
|
|
}
|
|
|
|
irq = platform_get_irq(pdev, 0);
|
|
if (irq < 0) {
|
|
dev_err(&pdev->dev, "failed to retrieve IRQ\n");
|
|
err = -ENODEV;
|
|
goto out;
|
|
}
|
|
|
|
if (!request_mem_region(base->start, resource_size(base), pdev->name)) {
|
|
dev_err(&pdev->dev, "failed to request memory region for base registers\n");
|
|
err = -ENXIO;
|
|
goto out;
|
|
}
|
|
|
|
if (!request_mem_region(macen->start, resource_size(macen), pdev->name)) {
|
|
dev_err(&pdev->dev, "failed to request memory region for MAC enable register\n");
|
|
err = -ENXIO;
|
|
goto err_request;
|
|
}
|
|
|
|
dev = alloc_etherdev(sizeof(struct au1000_private));
|
|
if (!dev) {
|
|
dev_err(&pdev->dev, "alloc_etherdev failed\n");
|
|
err = -ENOMEM;
|
|
goto err_alloc;
|
|
}
|
|
|
|
SET_NETDEV_DEV(dev, &pdev->dev);
|
|
platform_set_drvdata(pdev, dev);
|
|
aup = netdev_priv(dev);
|
|
|
|
spin_lock_init(&aup->lock);
|
|
aup->msg_enable = (au1000_debug < 4 ? AU1000_DEF_MSG_ENABLE : au1000_debug);
|
|
|
|
/* Allocate the data buffers */
|
|
/* Snooping works fine with eth on all au1xxx */
|
|
aup->vaddr = (u32)dma_alloc_noncoherent(NULL, MAX_BUF_SIZE *
|
|
(NUM_TX_BUFFS + NUM_RX_BUFFS),
|
|
&aup->dma_addr, 0);
|
|
if (!aup->vaddr) {
|
|
dev_err(&pdev->dev, "failed to allocate data buffers\n");
|
|
err = -ENOMEM;
|
|
goto err_vaddr;
|
|
}
|
|
|
|
/* aup->mac is the base address of the MAC's registers */
|
|
aup->mac = (volatile mac_reg_t *)ioremap_nocache(base->start, resource_size(base));
|
|
if (!aup->mac) {
|
|
dev_err(&pdev->dev, "failed to ioremap MAC registers\n");
|
|
err = -ENXIO;
|
|
goto err_remap1;
|
|
}
|
|
|
|
/* Setup some variables for quick register address access */
|
|
aup->enable = (volatile u32 *)ioremap_nocache(macen->start, resource_size(macen));
|
|
if (!aup->enable) {
|
|
dev_err(&pdev->dev, "failed to ioremap MAC enable register\n");
|
|
err = -ENXIO;
|
|
goto err_remap2;
|
|
}
|
|
aup->mac_id = pdev->id;
|
|
|
|
if (pdev->id == 0)
|
|
au1000_setup_hw_rings(aup, MAC0_RX_DMA_ADDR, MAC0_TX_DMA_ADDR);
|
|
else if (pdev->id == 1)
|
|
au1000_setup_hw_rings(aup, MAC1_RX_DMA_ADDR, MAC1_TX_DMA_ADDR);
|
|
|
|
/* set a random MAC now in case platform_data doesn't provide one */
|
|
random_ether_addr(dev->dev_addr);
|
|
|
|
*aup->enable = 0;
|
|
aup->mac_enabled = 0;
|
|
|
|
pd = pdev->dev.platform_data;
|
|
if (!pd) {
|
|
dev_info(&pdev->dev, "no platform_data passed, PHY search on MAC0\n");
|
|
aup->phy1_search_mac0 = 1;
|
|
} else {
|
|
if (is_valid_ether_addr(pd->mac))
|
|
memcpy(dev->dev_addr, pd->mac, 6);
|
|
|
|
aup->phy_static_config = pd->phy_static_config;
|
|
aup->phy_search_highest_addr = pd->phy_search_highest_addr;
|
|
aup->phy1_search_mac0 = pd->phy1_search_mac0;
|
|
aup->phy_addr = pd->phy_addr;
|
|
aup->phy_busid = pd->phy_busid;
|
|
aup->phy_irq = pd->phy_irq;
|
|
}
|
|
|
|
if (aup->phy_busid && aup->phy_busid > 0) {
|
|
dev_err(&pdev->dev, "MAC0-associated PHY attached 2nd MACs MII"
|
|
"bus not supported yet\n");
|
|
err = -ENODEV;
|
|
goto err_mdiobus_alloc;
|
|
}
|
|
|
|
aup->mii_bus = mdiobus_alloc();
|
|
if (aup->mii_bus == NULL) {
|
|
dev_err(&pdev->dev, "failed to allocate mdiobus structure\n");
|
|
err = -ENOMEM;
|
|
goto err_mdiobus_alloc;
|
|
}
|
|
|
|
aup->mii_bus->priv = dev;
|
|
aup->mii_bus->read = au1000_mdiobus_read;
|
|
aup->mii_bus->write = au1000_mdiobus_write;
|
|
aup->mii_bus->reset = au1000_mdiobus_reset;
|
|
aup->mii_bus->name = "au1000_eth_mii";
|
|
snprintf(aup->mii_bus->id, MII_BUS_ID_SIZE, "%x", aup->mac_id);
|
|
aup->mii_bus->irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
|
|
if (aup->mii_bus->irq == NULL)
|
|
goto err_out;
|
|
|
|
for (i = 0; i < PHY_MAX_ADDR; ++i)
|
|
aup->mii_bus->irq[i] = PHY_POLL;
|
|
/* if known, set corresponding PHY IRQs */
|
|
if (aup->phy_static_config)
|
|
if (aup->phy_irq && aup->phy_busid == aup->mac_id)
|
|
aup->mii_bus->irq[aup->phy_addr] = aup->phy_irq;
|
|
|
|
err = mdiobus_register(aup->mii_bus);
|
|
if (err) {
|
|
dev_err(&pdev->dev, "failed to register MDIO bus\n");
|
|
goto err_mdiobus_reg;
|
|
}
|
|
|
|
if (au1000_mii_probe(dev) != 0)
|
|
goto err_out;
|
|
|
|
pDBfree = NULL;
|
|
/* setup the data buffer descriptors and attach a buffer to each one */
|
|
pDB = aup->db;
|
|
for (i = 0; i < (NUM_TX_BUFFS+NUM_RX_BUFFS); i++) {
|
|
pDB->pnext = pDBfree;
|
|
pDBfree = pDB;
|
|
pDB->vaddr = (u32 *)((unsigned)aup->vaddr + MAX_BUF_SIZE*i);
|
|
pDB->dma_addr = (dma_addr_t)virt_to_bus(pDB->vaddr);
|
|
pDB++;
|
|
}
|
|
aup->pDBfree = pDBfree;
|
|
|
|
for (i = 0; i < NUM_RX_DMA; i++) {
|
|
pDB = au1000_GetFreeDB(aup);
|
|
if (!pDB) {
|
|
goto err_out;
|
|
}
|
|
aup->rx_dma_ring[i]->buff_stat = (unsigned)pDB->dma_addr;
|
|
aup->rx_db_inuse[i] = pDB;
|
|
}
|
|
for (i = 0; i < NUM_TX_DMA; i++) {
|
|
pDB = au1000_GetFreeDB(aup);
|
|
if (!pDB) {
|
|
goto err_out;
|
|
}
|
|
aup->tx_dma_ring[i]->buff_stat = (unsigned)pDB->dma_addr;
|
|
aup->tx_dma_ring[i]->len = 0;
|
|
aup->tx_db_inuse[i] = pDB;
|
|
}
|
|
|
|
dev->base_addr = base->start;
|
|
dev->irq = irq;
|
|
dev->netdev_ops = &au1000_netdev_ops;
|
|
SET_ETHTOOL_OPS(dev, &au1000_ethtool_ops);
|
|
dev->watchdog_timeo = ETH_TX_TIMEOUT;
|
|
|
|
/*
|
|
* The boot code uses the ethernet controller, so reset it to start
|
|
* fresh. au1000_init() expects that the device is in reset state.
|
|
*/
|
|
au1000_reset_mac(dev);
|
|
|
|
err = register_netdev(dev);
|
|
if (err) {
|
|
netdev_err(dev, "Cannot register net device, aborting.\n");
|
|
goto err_out;
|
|
}
|
|
|
|
netdev_info(dev, "Au1xx0 Ethernet found at 0x%lx, irq %d\n",
|
|
(unsigned long)base->start, irq);
|
|
if (version_printed++ == 0)
|
|
printk("%s version %s %s\n", DRV_NAME, DRV_VERSION, DRV_AUTHOR);
|
|
|
|
return 0;
|
|
|
|
err_out:
|
|
if (aup->mii_bus != NULL)
|
|
mdiobus_unregister(aup->mii_bus);
|
|
|
|
/* here we should have a valid dev plus aup-> register addresses
|
|
* so we can reset the mac properly.*/
|
|
au1000_reset_mac(dev);
|
|
|
|
for (i = 0; i < NUM_RX_DMA; i++) {
|
|
if (aup->rx_db_inuse[i])
|
|
au1000_ReleaseDB(aup, aup->rx_db_inuse[i]);
|
|
}
|
|
for (i = 0; i < NUM_TX_DMA; i++) {
|
|
if (aup->tx_db_inuse[i])
|
|
au1000_ReleaseDB(aup, aup->tx_db_inuse[i]);
|
|
}
|
|
err_mdiobus_reg:
|
|
mdiobus_free(aup->mii_bus);
|
|
err_mdiobus_alloc:
|
|
iounmap(aup->enable);
|
|
err_remap2:
|
|
iounmap(aup->mac);
|
|
err_remap1:
|
|
dma_free_noncoherent(NULL, MAX_BUF_SIZE * (NUM_TX_BUFFS + NUM_RX_BUFFS),
|
|
(void *)aup->vaddr, aup->dma_addr);
|
|
err_vaddr:
|
|
free_netdev(dev);
|
|
err_alloc:
|
|
release_mem_region(macen->start, resource_size(macen));
|
|
err_request:
|
|
release_mem_region(base->start, resource_size(base));
|
|
out:
|
|
return err;
|
|
}
|
|
|
|
static int __devexit au1000_remove(struct platform_device *pdev)
|
|
{
|
|
struct net_device *dev = platform_get_drvdata(pdev);
|
|
struct au1000_private *aup = netdev_priv(dev);
|
|
int i;
|
|
struct resource *base, *macen;
|
|
|
|
platform_set_drvdata(pdev, NULL);
|
|
|
|
unregister_netdev(dev);
|
|
mdiobus_unregister(aup->mii_bus);
|
|
mdiobus_free(aup->mii_bus);
|
|
|
|
for (i = 0; i < NUM_RX_DMA; i++)
|
|
if (aup->rx_db_inuse[i])
|
|
au1000_ReleaseDB(aup, aup->rx_db_inuse[i]);
|
|
|
|
for (i = 0; i < NUM_TX_DMA; i++)
|
|
if (aup->tx_db_inuse[i])
|
|
au1000_ReleaseDB(aup, aup->tx_db_inuse[i]);
|
|
|
|
dma_free_noncoherent(NULL, MAX_BUF_SIZE *
|
|
(NUM_TX_BUFFS + NUM_RX_BUFFS),
|
|
(void *)aup->vaddr, aup->dma_addr);
|
|
|
|
iounmap(aup->mac);
|
|
iounmap(aup->enable);
|
|
|
|
base = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
release_mem_region(base->start, resource_size(base));
|
|
|
|
macen = platform_get_resource(pdev, IORESOURCE_MEM, 1);
|
|
release_mem_region(macen->start, resource_size(macen));
|
|
|
|
free_netdev(dev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver au1000_eth_driver = {
|
|
.probe = au1000_probe,
|
|
.remove = __devexit_p(au1000_remove),
|
|
.driver = {
|
|
.name = "au1000-eth",
|
|
.owner = THIS_MODULE,
|
|
},
|
|
};
|
|
MODULE_ALIAS("platform:au1000-eth");
|
|
|
|
|
|
static int __init au1000_init_module(void)
|
|
{
|
|
return platform_driver_register(&au1000_eth_driver);
|
|
}
|
|
|
|
static void __exit au1000_exit_module(void)
|
|
{
|
|
platform_driver_unregister(&au1000_eth_driver);
|
|
}
|
|
|
|
module_init(au1000_init_module);
|
|
module_exit(au1000_exit_module);
|