mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-12 18:36:39 +07:00
a7eb518998
Impact: Cleanup; fix inappropriate macro use ISA addresses on x86 are mapped 1:1 with the physical address space. Since the ISA address space is only 24 bits (32 for VLB or LPC) it will always fit in an unsigned int, and at least in the aha1542 driver using a wider type would cause an undesirable promotion. Hence explicitly cast the ISA bus addresses to unsigned int. Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> Cc: James Bottomley <James.Bottomley@hansenpartnership.com>
206 lines
6.0 KiB
C
206 lines
6.0 KiB
C
#ifndef _ASM_X86_IO_H
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#define _ASM_X86_IO_H
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#define ARCH_HAS_IOREMAP_WC
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#include <linux/compiler.h>
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#include <asm-generic/int-ll64.h>
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#include <asm/page.h>
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#define build_mmio_read(name, size, type, reg, barrier) \
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static inline type name(const volatile void __iomem *addr) \
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{ type ret; asm volatile("mov" size " %1,%0":reg (ret) \
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:"m" (*(volatile type __force *)addr) barrier); return ret; }
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#define build_mmio_write(name, size, type, reg, barrier) \
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static inline void name(type val, volatile void __iomem *addr) \
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{ asm volatile("mov" size " %0,%1": :reg (val), \
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"m" (*(volatile type __force *)addr) barrier); }
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build_mmio_read(readb, "b", unsigned char, "=q", :"memory")
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build_mmio_read(readw, "w", unsigned short, "=r", :"memory")
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build_mmio_read(readl, "l", unsigned int, "=r", :"memory")
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build_mmio_read(__readb, "b", unsigned char, "=q", )
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build_mmio_read(__readw, "w", unsigned short, "=r", )
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build_mmio_read(__readl, "l", unsigned int, "=r", )
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build_mmio_write(writeb, "b", unsigned char, "q", :"memory")
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build_mmio_write(writew, "w", unsigned short, "r", :"memory")
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build_mmio_write(writel, "l", unsigned int, "r", :"memory")
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build_mmio_write(__writeb, "b", unsigned char, "q", )
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build_mmio_write(__writew, "w", unsigned short, "r", )
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build_mmio_write(__writel, "l", unsigned int, "r", )
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#define readb_relaxed(a) __readb(a)
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#define readw_relaxed(a) __readw(a)
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#define readl_relaxed(a) __readl(a)
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#define __raw_readb __readb
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#define __raw_readw __readw
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#define __raw_readl __readl
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#define __raw_writeb __writeb
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#define __raw_writew __writew
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#define __raw_writel __writel
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#define mmiowb() barrier()
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#ifdef CONFIG_X86_64
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build_mmio_read(readq, "q", unsigned long, "=r", :"memory")
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build_mmio_write(writeq, "q", unsigned long, "r", :"memory")
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#else
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static inline __u64 readq(const volatile void __iomem *addr)
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{
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const volatile u32 __iomem *p = addr;
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u32 low, high;
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low = readl(p);
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high = readl(p + 1);
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return low + ((u64)high << 32);
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}
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static inline void writeq(__u64 val, volatile void __iomem *addr)
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{
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writel(val, addr);
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writel(val >> 32, addr+4);
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}
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#endif
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#define readq_relaxed(a) readq(a)
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#define __raw_readq(a) readq(a)
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#define __raw_writeq(val, addr) writeq(val, addr)
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/* Let people know that we have them */
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#define readq readq
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#define writeq writeq
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/**
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* virt_to_phys - map virtual addresses to physical
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* @address: address to remap
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*
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* The returned physical address is the physical (CPU) mapping for
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* the memory address given. It is only valid to use this function on
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* addresses directly mapped or allocated via kmalloc.
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*
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* This function does not give bus mappings for DMA transfers. In
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* almost all conceivable cases a device driver should not be using
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* this function
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*/
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static inline phys_addr_t virt_to_phys(volatile void *address)
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{
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return __pa(address);
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}
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/**
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* phys_to_virt - map physical address to virtual
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* @address: address to remap
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*
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* The returned virtual address is a current CPU mapping for
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* the memory address given. It is only valid to use this function on
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* addresses that have a kernel mapping
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*
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* This function does not handle bus mappings for DMA transfers. In
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* almost all conceivable cases a device driver should not be using
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* this function
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*/
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static inline void *phys_to_virt(phys_addr_t address)
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{
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return __va(address);
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}
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/*
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* Change "struct page" to physical address.
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*/
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#define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
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/*
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* ISA I/O bus memory addresses are 1:1 with the physical address.
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* However, we truncate the address to unsigned int to avoid undesirable
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* promitions in legacy drivers.
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*/
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static inline unsigned int isa_virt_to_bus(volatile void *address)
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{
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return (unsigned int)virt_to_phys(address);
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}
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#define isa_page_to_bus(page) ((unsigned int)page_to_phys(page))
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#define isa_bus_to_virt phys_to_virt
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/*
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* However PCI ones are not necessarily 1:1 and therefore these interfaces
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* are forbidden in portable PCI drivers.
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*
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* Allow them on x86 for legacy drivers, though.
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*/
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#define virt_to_bus virt_to_phys
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#define bus_to_virt phys_to_virt
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/**
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* ioremap - map bus memory into CPU space
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* @offset: bus address of the memory
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* @size: size of the resource to map
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*
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* ioremap performs a platform specific sequence of operations to
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* make bus memory CPU accessible via the readb/readw/readl/writeb/
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* writew/writel functions and the other mmio helpers. The returned
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* address is not guaranteed to be usable directly as a virtual
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* address.
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*
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* If the area you are trying to map is a PCI BAR you should have a
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* look at pci_iomap().
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*/
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extern void __iomem *ioremap_nocache(resource_size_t offset, unsigned long size);
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extern void __iomem *ioremap_cache(resource_size_t offset, unsigned long size);
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extern void __iomem *ioremap_prot(resource_size_t offset, unsigned long size,
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unsigned long prot_val);
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/*
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* The default ioremap() behavior is non-cached:
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*/
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static inline void __iomem *ioremap(resource_size_t offset, unsigned long size)
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{
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return ioremap_nocache(offset, size);
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}
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extern void iounmap(volatile void __iomem *addr);
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extern void __iomem *fix_ioremap(unsigned idx, unsigned long phys);
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#ifdef CONFIG_X86_32
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# include "io_32.h"
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#else
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# include "io_64.h"
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#endif
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extern void *xlate_dev_mem_ptr(unsigned long phys);
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extern void unxlate_dev_mem_ptr(unsigned long phys, void *addr);
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extern int ioremap_change_attr(unsigned long vaddr, unsigned long size,
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unsigned long prot_val);
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extern void __iomem *ioremap_wc(resource_size_t offset, unsigned long size);
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/*
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* early_ioremap() and early_iounmap() are for temporary early boot-time
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* mappings, before the real ioremap() is functional.
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* A boot-time mapping is currently limited to at most 16 pages.
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*/
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extern void early_ioremap_init(void);
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extern void early_ioremap_reset(void);
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extern void __iomem *early_ioremap(unsigned long offset, unsigned long size);
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extern void __iomem *early_memremap(unsigned long offset, unsigned long size);
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extern void early_iounmap(void __iomem *addr, unsigned long size);
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extern void __iomem *fix_ioremap(unsigned idx, unsigned long phys);
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#define IO_SPACE_LIMIT 0xffff
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#endif /* _ASM_X86_IO_H */
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