mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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99436f7d69
Correct the check for the span of the 256MB segment addressable by the J instruction according to this instruction's semantics. The calculation of the jump target is applied to the address of the delay-slot instruction that immediately follows. Adjust the check accordingly by adding 4 to `e->code' that holds the address of the J instruction itself. Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8515/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
55 lines
1.3 KiB
C
55 lines
1.3 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (c) 2010 Cavium Networks, Inc.
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*/
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#include <linux/jump_label.h>
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#include <linux/kernel.h>
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#include <linux/memory.h>
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#include <linux/mutex.h>
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#include <linux/types.h>
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#include <linux/cpu.h>
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#include <asm/cacheflush.h>
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#include <asm/inst.h>
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#ifdef HAVE_JUMP_LABEL
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#define J_RANGE_MASK ((1ul << 28) - 1)
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void arch_jump_label_transform(struct jump_entry *e,
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enum jump_label_type type)
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{
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union mips_instruction insn;
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union mips_instruction *insn_p =
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(union mips_instruction *)(unsigned long)e->code;
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/* Jump only works within a 256MB aligned region of its delay slot. */
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BUG_ON((e->target & ~J_RANGE_MASK) != ((e->code + 4) & ~J_RANGE_MASK));
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/* Target must have 4 byte alignment. */
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BUG_ON((e->target & 3) != 0);
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if (type == JUMP_LABEL_ENABLE) {
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insn.j_format.opcode = j_op;
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insn.j_format.target = (e->target & J_RANGE_MASK) >> 2;
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} else {
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insn.word = 0; /* nop */
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}
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get_online_cpus();
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mutex_lock(&text_mutex);
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*insn_p = insn;
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flush_icache_range((unsigned long)insn_p,
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(unsigned long)insn_p + sizeof(*insn_p));
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mutex_unlock(&text_mutex);
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put_online_cpus();
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}
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#endif /* HAVE_JUMP_LABEL */
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