Fatemeh Darbehani 98e90a34cc drm/amd/display: Retiring set_display_requirements in dm_pp_smu.h - part2 ... [Why] In DCN we want direct DAL to SMU calls, with as little as possible interference by pplib. The reason for each pp_smu interface mapping to 1 SMU message is so we can have the sequencing of different SMU message in dal and shared across different OS. This will also simplify debugging as DAL owns this interaction and there's no confusion about division of ownership. [How] Part 2: Separate set_min_deep_sleep_dcfclk message from the SMU messages that are sent as part of dm_pp_apply_clock_for_voltage_request. Directly notify min dcfclk to smu Signed-off-by: Fatemeh Darbehani <fatemeh.darbehani@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2018-11-05 14:20:47 -05:00
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drm	drm/amd/display: Retiring set_display_requirements in dm_pp_smu.h - part2	2018-11-05 14:20:47 -05:00
host1x	gpu: host1x: Detach Host1x from IOMMU DMA domain on arm32	2018-09-26 17:11:14 +02:00
ipu-v3	media: v4l: mediabus: Recognise CSI-2 D-PHY and C-PHY	2018-10-04 16:06:15 -04:00
vga	ALSA: hda - Enable runtime PM only for discrete GPU	2018-09-13 17:58:30 +02:00
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