mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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0f4054df0b
Don't use DEFINE_PCI_DEVICE_TABLE macro, because this macro is not preferred. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
247 lines
6.1 KiB
C
247 lines
6.1 KiB
C
/*
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* UIO driver fo Humusoft MF624 DAQ card.
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* Copyright (C) 2011 Rostislav Lisovy <lisovy@gmail.com>,
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* Czech Technical University in Prague
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/device.h>
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#include <linux/pci.h>
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#include <linux/slab.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/uio_driver.h>
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#define PCI_VENDOR_ID_HUMUSOFT 0x186c
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#define PCI_DEVICE_ID_MF624 0x0624
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#define PCI_SUBVENDOR_ID_HUMUSOFT 0x186c
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#define PCI_SUBDEVICE_DEVICE 0x0624
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/* BAR0 Interrupt control/status register */
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#define INTCSR 0x4C
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#define INTCSR_ADINT_ENABLE (1 << 0)
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#define INTCSR_CTR4INT_ENABLE (1 << 3)
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#define INTCSR_PCIINT_ENABLE (1 << 6)
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#define INTCSR_ADINT_STATUS (1 << 2)
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#define INTCSR_CTR4INT_STATUS (1 << 5)
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enum mf624_interrupt_source {ADC, CTR4, ALL};
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static void mf624_disable_interrupt(enum mf624_interrupt_source source,
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struct uio_info *info)
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{
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void __iomem *INTCSR_reg = info->mem[0].internal_addr + INTCSR;
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switch (source) {
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case ADC:
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iowrite32(ioread32(INTCSR_reg)
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& ~(INTCSR_ADINT_ENABLE | INTCSR_PCIINT_ENABLE),
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INTCSR_reg);
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break;
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case CTR4:
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iowrite32(ioread32(INTCSR_reg)
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& ~(INTCSR_CTR4INT_ENABLE | INTCSR_PCIINT_ENABLE),
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INTCSR_reg);
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break;
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case ALL:
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default:
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iowrite32(ioread32(INTCSR_reg)
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& ~(INTCSR_ADINT_ENABLE | INTCSR_CTR4INT_ENABLE
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| INTCSR_PCIINT_ENABLE),
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INTCSR_reg);
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break;
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}
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}
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static void mf624_enable_interrupt(enum mf624_interrupt_source source,
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struct uio_info *info)
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{
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void __iomem *INTCSR_reg = info->mem[0].internal_addr + INTCSR;
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switch (source) {
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case ADC:
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iowrite32(ioread32(INTCSR_reg)
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| INTCSR_ADINT_ENABLE | INTCSR_PCIINT_ENABLE,
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INTCSR_reg);
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break;
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case CTR4:
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iowrite32(ioread32(INTCSR_reg)
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| INTCSR_CTR4INT_ENABLE | INTCSR_PCIINT_ENABLE,
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INTCSR_reg);
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break;
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case ALL:
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default:
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iowrite32(ioread32(INTCSR_reg)
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| INTCSR_ADINT_ENABLE | INTCSR_CTR4INT_ENABLE
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| INTCSR_PCIINT_ENABLE,
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INTCSR_reg);
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break;
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}
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}
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static irqreturn_t mf624_irq_handler(int irq, struct uio_info *info)
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{
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void __iomem *INTCSR_reg = info->mem[0].internal_addr + INTCSR;
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if ((ioread32(INTCSR_reg) & INTCSR_ADINT_ENABLE)
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&& (ioread32(INTCSR_reg) & INTCSR_ADINT_STATUS)) {
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mf624_disable_interrupt(ADC, info);
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return IRQ_HANDLED;
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}
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if ((ioread32(INTCSR_reg) & INTCSR_CTR4INT_ENABLE)
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&& (ioread32(INTCSR_reg) & INTCSR_CTR4INT_STATUS)) {
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mf624_disable_interrupt(CTR4, info);
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return IRQ_HANDLED;
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}
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return IRQ_NONE;
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}
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static int mf624_irqcontrol(struct uio_info *info, s32 irq_on)
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{
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if (irq_on == 0)
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mf624_disable_interrupt(ALL, info);
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else if (irq_on == 1)
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mf624_enable_interrupt(ALL, info);
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return 0;
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}
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static int mf624_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
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{
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struct uio_info *info;
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info = kzalloc(sizeof(struct uio_info), GFP_KERNEL);
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if (!info)
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return -ENOMEM;
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if (pci_enable_device(dev))
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goto out_free;
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if (pci_request_regions(dev, "mf624"))
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goto out_disable;
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info->name = "mf624";
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info->version = "0.0.1";
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/* Note: Datasheet says device uses BAR0, BAR1, BAR2 -- do not trust it */
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/* BAR0 */
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info->mem[0].name = "PCI chipset, interrupts, status "
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"bits, special functions";
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info->mem[0].addr = pci_resource_start(dev, 0);
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if (!info->mem[0].addr)
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goto out_release;
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info->mem[0].size = pci_resource_len(dev, 0);
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info->mem[0].memtype = UIO_MEM_PHYS;
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info->mem[0].internal_addr = pci_ioremap_bar(dev, 0);
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if (!info->mem[0].internal_addr)
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goto out_release;
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/* BAR2 */
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info->mem[1].name = "ADC, DAC, DIO";
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info->mem[1].addr = pci_resource_start(dev, 2);
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if (!info->mem[1].addr)
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goto out_unmap0;
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info->mem[1].size = pci_resource_len(dev, 2);
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info->mem[1].memtype = UIO_MEM_PHYS;
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info->mem[1].internal_addr = pci_ioremap_bar(dev, 2);
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if (!info->mem[1].internal_addr)
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goto out_unmap0;
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/* BAR4 */
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info->mem[2].name = "Counter/timer chip";
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info->mem[2].addr = pci_resource_start(dev, 4);
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if (!info->mem[2].addr)
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goto out_unmap1;
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info->mem[2].size = pci_resource_len(dev, 4);
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info->mem[2].memtype = UIO_MEM_PHYS;
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info->mem[2].internal_addr = pci_ioremap_bar(dev, 4);
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if (!info->mem[2].internal_addr)
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goto out_unmap1;
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info->irq = dev->irq;
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info->irq_flags = IRQF_SHARED;
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info->handler = mf624_irq_handler;
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info->irqcontrol = mf624_irqcontrol;
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if (uio_register_device(&dev->dev, info))
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goto out_unmap2;
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pci_set_drvdata(dev, info);
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return 0;
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out_unmap2:
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iounmap(info->mem[2].internal_addr);
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out_unmap1:
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iounmap(info->mem[1].internal_addr);
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out_unmap0:
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iounmap(info->mem[0].internal_addr);
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out_release:
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pci_release_regions(dev);
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out_disable:
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pci_disable_device(dev);
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out_free:
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kfree(info);
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return -ENODEV;
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}
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static void mf624_pci_remove(struct pci_dev *dev)
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{
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struct uio_info *info = pci_get_drvdata(dev);
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mf624_disable_interrupt(ALL, info);
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uio_unregister_device(info);
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pci_release_regions(dev);
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pci_disable_device(dev);
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iounmap(info->mem[0].internal_addr);
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iounmap(info->mem[1].internal_addr);
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iounmap(info->mem[2].internal_addr);
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kfree(info);
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}
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static const struct pci_device_id mf624_pci_id[] = {
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{ PCI_DEVICE(PCI_VENDOR_ID_HUMUSOFT, PCI_DEVICE_ID_MF624) },
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{ 0, }
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};
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static struct pci_driver mf624_pci_driver = {
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.name = "mf624",
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.id_table = mf624_pci_id,
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.probe = mf624_pci_probe,
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.remove = mf624_pci_remove,
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};
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MODULE_DEVICE_TABLE(pci, mf624_pci_id);
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module_pci_driver(mf624_pci_driver);
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MODULE_LICENSE("GPL v2");
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MODULE_AUTHOR("Rostislav Lisovy <lisovy@gmail.com>");
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