linux_dsm_epyc7002/arch/riscv
Mark Rutland 9837559d8e atomics/treewide: Make unconditional inc/dec ops optional
Many of the inc/dec ops are mandatory, but for most architectures inc/dec are
simply trivial wrappers around their corresponding add/sub ops.

Let's make all the inc/dec ops optional, so that we can get rid of these
boilerplate wrappers.

The instrumented atomics are updated accordingly.

There should be no functional change as a result of this patch.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Palmer Dabbelt <palmer@sifive.com>
Cc: Boqun Feng <boqun.feng@gmail.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/lkml/20180621121321.4761-17-mark.rutland@arm.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2018-06-21 14:25:24 +02:00
..
configs RISC-V: Add CONFIG_HVC_RISCV_SBI=y to defconfig 2018-06-11 09:16:24 -07:00
include atomics/treewide: Make unconditional inc/dec ops optional 2018-06-21 14:25:24 +02:00
kernel RISC-V Updates for the 4.18 Merge Window 2018-06-16 06:42:43 +09:00
lib RISC-V: Make our port sparse-clean 2018-06-11 09:09:49 -07:00
mm RISC-V changes for 4.16 2018-02-07 11:33:08 -08:00
Kconfig RISC-V Updates for the 4.18 Merge Window 2018-06-16 06:42:43 +09:00
Makefile riscv: add riscv-specific predefines to CHECKFLAGS 2018-06-11 09:03:43 -07:00