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Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not see http www gnu org licenses extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 15 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190530000437.237481593@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
246 lines
7.3 KiB
C
246 lines
7.3 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2002 Intersil Americas Inc.
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* Copyright (C) 2003-2004 Luis R. Rodriguez <mcgrof@ruslug.rutgers.edu>_
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*/
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/delay.h>
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#include <linux/ktime.h>
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#include <linux/uaccess.h>
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#include <asm/io.h>
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#include "prismcompat.h"
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#include "isl_38xx.h"
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#include "islpci_dev.h"
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#include "islpci_mgt.h"
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/******************************************************************************
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Device Interface & Control functions
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******************************************************************************/
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/**
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* isl38xx_disable_interrupts - disable all interrupts
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* @device: pci memory base address
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*
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* Instructs the device to disable all interrupt reporting by asserting
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* the IRQ line. New events may still show up in the interrupt identification
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* register located at offset %ISL38XX_INT_IDENT_REG.
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*/
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void
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isl38xx_disable_interrupts(void __iomem *device)
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{
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isl38xx_w32_flush(device, 0x00000000, ISL38XX_INT_EN_REG);
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udelay(ISL38XX_WRITEIO_DELAY);
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}
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void
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isl38xx_handle_sleep_request(isl38xx_control_block *control_block,
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int *powerstate, void __iomem *device_base)
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{
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/* device requests to go into sleep mode
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* check whether the transmit queues for data and management are empty */
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if (isl38xx_in_queue(control_block, ISL38XX_CB_TX_DATA_LQ))
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/* data tx queue not empty */
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return;
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if (isl38xx_in_queue(control_block, ISL38XX_CB_TX_MGMTQ))
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/* management tx queue not empty */
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return;
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/* check also whether received frames are pending */
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if (isl38xx_in_queue(control_block, ISL38XX_CB_RX_DATA_LQ))
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/* data rx queue not empty */
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return;
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if (isl38xx_in_queue(control_block, ISL38XX_CB_RX_MGMTQ))
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/* management rx queue not empty */
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return;
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#if VERBOSE > SHOW_ERROR_MESSAGES
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DEBUG(SHOW_TRACING, "Device going to sleep mode\n");
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#endif
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/* all queues are empty, allow the device to go into sleep mode */
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*powerstate = ISL38XX_PSM_POWERSAVE_STATE;
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/* assert the Sleep interrupt in the Device Interrupt Register */
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isl38xx_w32_flush(device_base, ISL38XX_DEV_INT_SLEEP,
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ISL38XX_DEV_INT_REG);
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udelay(ISL38XX_WRITEIO_DELAY);
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}
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void
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isl38xx_handle_wakeup(isl38xx_control_block *control_block,
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int *powerstate, void __iomem *device_base)
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{
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/* device is in active state, update the powerstate flag */
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*powerstate = ISL38XX_PSM_ACTIVE_STATE;
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/* now check whether there are frames pending for the card */
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if (!isl38xx_in_queue(control_block, ISL38XX_CB_TX_DATA_LQ)
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&& !isl38xx_in_queue(control_block, ISL38XX_CB_TX_MGMTQ))
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return;
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#if VERBOSE > SHOW_ERROR_MESSAGES
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DEBUG(SHOW_ANYTHING, "Wake up handler trigger the device\n");
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#endif
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/* either data or management transmit queue has a frame pending
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* trigger the device by setting the Update bit in the Device Int reg */
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isl38xx_w32_flush(device_base, ISL38XX_DEV_INT_UPDATE,
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ISL38XX_DEV_INT_REG);
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udelay(ISL38XX_WRITEIO_DELAY);
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}
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void
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isl38xx_trigger_device(int asleep, void __iomem *device_base)
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{
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u32 reg;
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#if VERBOSE > SHOW_ERROR_MESSAGES
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u32 counter = 0;
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struct timespec64 current_ts64;
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DEBUG(SHOW_FUNCTION_CALLS, "isl38xx trigger device\n");
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#endif
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/* check whether the device is in power save mode */
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if (asleep) {
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/* device is in powersave, trigger the device for wakeup */
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#if VERBOSE > SHOW_ERROR_MESSAGES
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ktime_get_real_ts64(¤t_ts64);
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DEBUG(SHOW_TRACING, "%lld.%09ld Device wakeup triggered\n",
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(s64)current_ts64.tv_sec, current_ts64.tv_nsec);
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DEBUG(SHOW_TRACING, "%lld.%09ld Device register read %08x\n",
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(s64)current_ts64.tv_sec, current_ts64.tv_nsec,
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readl(device_base + ISL38XX_CTRL_STAT_REG));
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#endif
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reg = readl(device_base + ISL38XX_INT_IDENT_REG);
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if (reg == 0xabadface) {
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#if VERBOSE > SHOW_ERROR_MESSAGES
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ktime_get_real_ts64(¤t_ts64);
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DEBUG(SHOW_TRACING,
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"%lld.%09ld Device register abadface\n",
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(s64)current_ts64.tv_sec, current_ts64.tv_nsec);
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#endif
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/* read the Device Status Register until Sleepmode bit is set */
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while (reg = readl(device_base + ISL38XX_CTRL_STAT_REG),
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(reg & ISL38XX_CTRL_STAT_SLEEPMODE) == 0) {
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udelay(ISL38XX_WRITEIO_DELAY);
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#if VERBOSE > SHOW_ERROR_MESSAGES
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counter++;
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#endif
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}
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#if VERBOSE > SHOW_ERROR_MESSAGES
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DEBUG(SHOW_TRACING,
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"%lld.%09ld Device register read %08x\n",
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(s64)current_ts64.tv_sec, current_ts64.tv_nsec,
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readl(device_base + ISL38XX_CTRL_STAT_REG));
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ktime_get_real_ts64(¤t_ts64);
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DEBUG(SHOW_TRACING,
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"%lld.%09ld Device asleep counter %i\n",
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(s64)current_ts64.tv_sec, current_ts64.tv_nsec,
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counter);
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#endif
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}
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/* assert the Wakeup interrupt in the Device Interrupt Register */
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isl38xx_w32_flush(device_base, ISL38XX_DEV_INT_WAKEUP,
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ISL38XX_DEV_INT_REG);
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#if VERBOSE > SHOW_ERROR_MESSAGES
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udelay(ISL38XX_WRITEIO_DELAY);
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/* perform another read on the Device Status Register */
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reg = readl(device_base + ISL38XX_CTRL_STAT_REG);
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ktime_get_real_ts64(¤t_ts64);
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DEBUG(SHOW_TRACING, "%lld.%00ld Device register read %08x\n",
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(s64)current_ts64.tv_sec, current_ts64.tv_nsec, reg);
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#endif
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} else {
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/* device is (still) awake */
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#if VERBOSE > SHOW_ERROR_MESSAGES
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DEBUG(SHOW_TRACING, "Device is in active state\n");
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#endif
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/* trigger the device by setting the Update bit in the Device Int reg */
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isl38xx_w32_flush(device_base, ISL38XX_DEV_INT_UPDATE,
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ISL38XX_DEV_INT_REG);
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}
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}
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void
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isl38xx_interface_reset(void __iomem *device_base, dma_addr_t host_address)
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{
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#if VERBOSE > SHOW_ERROR_MESSAGES
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DEBUG(SHOW_FUNCTION_CALLS, "isl38xx_interface_reset\n");
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#endif
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/* load the address of the control block in the device */
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isl38xx_w32_flush(device_base, host_address, ISL38XX_CTRL_BLK_BASE_REG);
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udelay(ISL38XX_WRITEIO_DELAY);
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/* set the reset bit in the Device Interrupt Register */
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isl38xx_w32_flush(device_base, ISL38XX_DEV_INT_RESET, ISL38XX_DEV_INT_REG);
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udelay(ISL38XX_WRITEIO_DELAY);
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/* enable the interrupt for detecting initialization */
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/* Note: Do not enable other interrupts here. We want the
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* device to have come up first 100% before allowing any other
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* interrupts. */
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isl38xx_w32_flush(device_base, ISL38XX_INT_IDENT_INIT, ISL38XX_INT_EN_REG);
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udelay(ISL38XX_WRITEIO_DELAY); /* allow complete full reset */
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}
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void
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isl38xx_enable_common_interrupts(void __iomem *device_base)
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{
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u32 reg;
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reg = ISL38XX_INT_IDENT_UPDATE | ISL38XX_INT_IDENT_SLEEP |
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ISL38XX_INT_IDENT_WAKEUP;
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isl38xx_w32_flush(device_base, reg, ISL38XX_INT_EN_REG);
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udelay(ISL38XX_WRITEIO_DELAY);
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}
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int
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isl38xx_in_queue(isl38xx_control_block *cb, int queue)
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{
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const s32 delta = (le32_to_cpu(cb->driver_curr_frag[queue]) -
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le32_to_cpu(cb->device_curr_frag[queue]));
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/* determine the amount of fragments in the queue depending on the type
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* of the queue, either transmit or receive */
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BUG_ON(delta < 0); /* driver ptr must be ahead of device ptr */
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switch (queue) {
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/* send queues */
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case ISL38XX_CB_TX_MGMTQ:
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BUG_ON(delta > ISL38XX_CB_MGMT_QSIZE);
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/* fall through */
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case ISL38XX_CB_TX_DATA_LQ:
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case ISL38XX_CB_TX_DATA_HQ:
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BUG_ON(delta > ISL38XX_CB_TX_QSIZE);
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return delta;
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/* receive queues */
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case ISL38XX_CB_RX_MGMTQ:
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BUG_ON(delta > ISL38XX_CB_MGMT_QSIZE);
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return ISL38XX_CB_MGMT_QSIZE - delta;
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case ISL38XX_CB_RX_DATA_LQ:
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case ISL38XX_CB_RX_DATA_HQ:
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BUG_ON(delta > ISL38XX_CB_RX_QSIZE);
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return ISL38XX_CB_RX_QSIZE - delta;
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}
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BUG();
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return 0;
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}
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