mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
687e3d5550
As of_get_mac_address now supports NVMEM under the hood, we need to update the bindings documentation with the new nvmem-cell* properties, which would mean copy&pasting a lot of redundant information to every binding documentation currently referencing some of the MAC address properties. So I've just removed all the references to the optional MAC address properties and replaced them with the small note referencing net/ethernet.txt file. Signed-off-by: Petr Štetiar <ynezz@true.cz> Signed-off-by: David S. Miller <davem@davemloft.net>
114 lines
4.0 KiB
Plaintext
114 lines
4.0 KiB
Plaintext
* Altera Triple-Speed Ethernet MAC driver (TSE)
|
|
|
|
Required properties:
|
|
- compatible: Should be "altr,tse-1.0" for legacy SGDMA based TSE, and should
|
|
be "altr,tse-msgdma-1.0" for the preferred MSGDMA based TSE.
|
|
ALTR is supported for legacy device trees, but is deprecated.
|
|
altr should be used for all new designs.
|
|
- reg: Address and length of the register set for the device. It contains
|
|
the information of registers in the same order as described by reg-names
|
|
- reg-names: Should contain the reg names
|
|
"control_port": MAC configuration space region
|
|
"tx_csr": xDMA Tx dispatcher control and status space region
|
|
"tx_desc": MSGDMA Tx dispatcher descriptor space region
|
|
"rx_csr" : xDMA Rx dispatcher control and status space region
|
|
"rx_desc": MSGDMA Rx dispatcher descriptor space region
|
|
"rx_resp": MSGDMA Rx dispatcher response space region
|
|
"s1": SGDMA descriptor memory
|
|
- interrupts: Should contain the TSE interrupts and it's mode.
|
|
- interrupt-names: Should contain the interrupt names
|
|
"rx_irq": xDMA Rx dispatcher interrupt
|
|
"tx_irq": xDMA Tx dispatcher interrupt
|
|
- rx-fifo-depth: MAC receive FIFO buffer depth in bytes
|
|
- tx-fifo-depth: MAC transmit FIFO buffer depth in bytes
|
|
- phy-mode: See ethernet.txt in the same directory.
|
|
- phy-handle: See ethernet.txt in the same directory.
|
|
- phy-addr: See ethernet.txt in the same directory. A configuration should
|
|
include phy-handle or phy-addr.
|
|
- altr,has-supplementary-unicast:
|
|
If present, TSE supports additional unicast addresses.
|
|
Otherwise additional unicast addresses are not supported.
|
|
- altr,has-hash-multicast-filter:
|
|
If present, TSE supports a hash based multicast filter.
|
|
Otherwise, hash-based multicast filtering is not supported.
|
|
|
|
- mdio device tree subnode: When the TSE has a phy connected to its local
|
|
mdio, there must be device tree subnode with the following
|
|
required properties:
|
|
|
|
- compatible: Must be "altr,tse-mdio".
|
|
- #address-cells: Must be <1>.
|
|
- #size-cells: Must be <0>.
|
|
|
|
For each phy on the mdio bus, there must be a node with the following
|
|
fields:
|
|
|
|
- reg: phy id used to communicate to phy.
|
|
- device_type: Must be "ethernet-phy".
|
|
|
|
The MAC address will be determined using the optional properties defined in
|
|
ethernet.txt.
|
|
|
|
Example:
|
|
|
|
tse_sub_0_eth_tse_0: ethernet@1,00000000 {
|
|
compatible = "altr,tse-msgdma-1.0";
|
|
reg = <0x00000001 0x00000000 0x00000400>,
|
|
<0x00000001 0x00000460 0x00000020>,
|
|
<0x00000001 0x00000480 0x00000020>,
|
|
<0x00000001 0x000004A0 0x00000008>,
|
|
<0x00000001 0x00000400 0x00000020>,
|
|
<0x00000001 0x00000420 0x00000020>;
|
|
reg-names = "control_port", "rx_csr", "rx_desc", "rx_resp", "tx_csr", "tx_desc";
|
|
interrupt-parent = <&hps_0_arm_gic_0>;
|
|
interrupts = <0 41 4>, <0 40 4>;
|
|
interrupt-names = "rx_irq", "tx_irq";
|
|
rx-fifo-depth = <2048>;
|
|
tx-fifo-depth = <2048>;
|
|
address-bits = <48>;
|
|
max-frame-size = <1500>;
|
|
local-mac-address = [ 00 00 00 00 00 00 ];
|
|
phy-mode = "gmii";
|
|
altr,has-supplementary-unicast;
|
|
altr,has-hash-multicast-filter;
|
|
phy-handle = <&phy0>;
|
|
mdio {
|
|
compatible = "altr,tse-mdio";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
phy0: ethernet-phy@0 {
|
|
reg = <0x0>;
|
|
device_type = "ethernet-phy";
|
|
};
|
|
|
|
phy1: ethernet-phy@1 {
|
|
reg = <0x1>;
|
|
device_type = "ethernet-phy";
|
|
};
|
|
|
|
};
|
|
};
|
|
|
|
tse_sub_1_eth_tse_0: ethernet@1,00001000 {
|
|
compatible = "altr,tse-msgdma-1.0";
|
|
reg = <0x00000001 0x00001000 0x00000400>,
|
|
<0x00000001 0x00001460 0x00000020>,
|
|
<0x00000001 0x00001480 0x00000020>,
|
|
<0x00000001 0x000014A0 0x00000008>,
|
|
<0x00000001 0x00001400 0x00000020>,
|
|
<0x00000001 0x00001420 0x00000020>;
|
|
reg-names = "control_port", "rx_csr", "rx_desc", "rx_resp", "tx_csr", "tx_desc";
|
|
interrupt-parent = <&hps_0_arm_gic_0>;
|
|
interrupts = <0 43 4>, <0 42 4>;
|
|
interrupt-names = "rx_irq", "tx_irq";
|
|
rx-fifo-depth = <2048>;
|
|
tx-fifo-depth = <2048>;
|
|
address-bits = <48>;
|
|
max-frame-size = <1500>;
|
|
local-mac-address = [ 00 00 00 00 00 00 ];
|
|
phy-mode = "gmii";
|
|
altr,has-supplementary-unicast;
|
|
altr,has-hash-multicast-filter;
|
|
phy-handle = <&phy1>;
|
|
};
|