mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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7de9cf4740
This patch contains cache and TLB maintenance functions. Signed-off-by: Vincent Chen <vincentc@andestech.com> Signed-off-by: Greentime Hu <greentime@andestech.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
51 lines
1.3 KiB
C
51 lines
1.3 KiB
C
// SPDX-License-Identifier: GPL-2.0
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// Copyright (C) 2005-2017 Andes Technology Corporation
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#include <linux/spinlock_types.h>
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#include <linux/mm.h>
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#include <linux/sched.h>
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#include <asm/nds32.h>
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#include <nds32_intrinsic.h>
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unsigned int cpu_last_cid = { TLB_MISC_mskCID + (2 << TLB_MISC_offCID) };
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DEFINE_SPINLOCK(cid_lock);
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void local_flush_tlb_range(struct vm_area_struct *vma,
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unsigned long start, unsigned long end)
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{
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unsigned long flags, ocid, ncid;
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if ((end - start) > 0x400000) {
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__nds32__tlbop_flua();
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__nds32__isb();
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return;
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}
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spin_lock_irqsave(&cid_lock, flags);
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ocid = __nds32__mfsr(NDS32_SR_TLB_MISC);
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ncid = (ocid & ~TLB_MISC_mskCID) | vma->vm_mm->context.id;
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__nds32__mtsr_dsb(ncid, NDS32_SR_TLB_MISC);
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while (start < end) {
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__nds32__tlbop_inv(start);
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__nds32__isb();
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start += PAGE_SIZE;
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}
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__nds32__mtsr_dsb(ocid, NDS32_SR_TLB_MISC);
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spin_unlock_irqrestore(&cid_lock, flags);
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}
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void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long addr)
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{
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unsigned long flags, ocid, ncid;
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spin_lock_irqsave(&cid_lock, flags);
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ocid = __nds32__mfsr(NDS32_SR_TLB_MISC);
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ncid = (ocid & ~TLB_MISC_mskCID) | vma->vm_mm->context.id;
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__nds32__mtsr_dsb(ncid, NDS32_SR_TLB_MISC);
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__nds32__tlbop_inv(addr);
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__nds32__isb();
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__nds32__mtsr_dsb(ocid, NDS32_SR_TLB_MISC);
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spin_unlock_irqrestore(&cid_lock, flags);
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}
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