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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-22 18:03:21 +07:00
a81844034e
Save ACPI information in context so that we can match machine driver with sdw _ADR matching tables. Suggested-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com> Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20200716150947.22119-10-yung-chuan.liao@linux.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
466 lines
11 KiB
C
466 lines
11 KiB
C
// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
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// Copyright(c) 2015-17 Intel Corporation.
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/*
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* SDW Intel Init Routines
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*
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* Initializes and creates SDW devices based on ACPI and Hardware values
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*/
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#include <linux/acpi.h>
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#include <linux/export.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/soundwire/sdw_intel.h>
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#include "cadence_master.h"
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#include "intel.h"
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#define SDW_LINK_TYPE 4 /* from Intel ACPI documentation */
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#define SDW_MAX_LINKS 4
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#define SDW_SHIM_LCAP 0x0
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#define SDW_SHIM_BASE 0x2C000
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#define SDW_ALH_BASE 0x2C800
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#define SDW_LINK_BASE 0x30000
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#define SDW_LINK_SIZE 0x10000
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static int ctrl_link_mask;
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module_param_named(sdw_link_mask, ctrl_link_mask, int, 0444);
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MODULE_PARM_DESC(sdw_link_mask, "Intel link mask (one bit per link)");
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static bool is_link_enabled(struct fwnode_handle *fw_node, int i)
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{
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struct fwnode_handle *link;
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char name[32];
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u32 quirk_mask = 0;
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/* Find master handle */
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snprintf(name, sizeof(name),
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"mipi-sdw-link-%d-subproperties", i);
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link = fwnode_get_named_child_node(fw_node, name);
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if (!link)
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return false;
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fwnode_property_read_u32(link,
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"intel-quirk-mask",
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&quirk_mask);
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if (quirk_mask & SDW_INTEL_QUIRK_MASK_BUS_DISABLE)
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return false;
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return true;
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}
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static int sdw_intel_cleanup(struct sdw_intel_ctx *ctx)
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{
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struct sdw_intel_link_res *link = ctx->links;
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u32 link_mask;
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int i;
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if (!link)
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return 0;
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link_mask = ctx->link_mask;
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for (i = 0; i < ctx->count; i++, link++) {
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if (!(link_mask & BIT(i)))
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continue;
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if (link->pdev)
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platform_device_unregister(link->pdev);
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}
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return 0;
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}
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static int
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sdw_intel_scan_controller(struct sdw_intel_acpi_info *info)
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{
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struct acpi_device *adev;
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int ret, i;
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u8 count;
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if (acpi_bus_get_device(info->handle, &adev))
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return -EINVAL;
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/* Found controller, find links supported */
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count = 0;
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ret = fwnode_property_read_u8_array(acpi_fwnode_handle(adev),
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"mipi-sdw-master-count", &count, 1);
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/*
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* In theory we could check the number of links supported in
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* hardware, but in that step we cannot assume SoundWire IP is
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* powered.
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*
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* In addition, if the BIOS doesn't even provide this
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* 'master-count' property then all the inits based on link
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* masks will fail as well.
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*
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* We will check the hardware capabilities in the startup() step
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*/
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if (ret) {
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dev_err(&adev->dev,
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"Failed to read mipi-sdw-master-count: %d\n", ret);
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return -EINVAL;
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}
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/* Check count is within bounds */
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if (count > SDW_MAX_LINKS) {
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dev_err(&adev->dev, "Link count %d exceeds max %d\n",
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count, SDW_MAX_LINKS);
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return -EINVAL;
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}
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if (!count) {
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dev_warn(&adev->dev, "No SoundWire links detected\n");
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return -EINVAL;
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}
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dev_dbg(&adev->dev, "ACPI reports %d SDW Link devices\n", count);
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info->count = count;
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info->link_mask = 0;
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for (i = 0; i < count; i++) {
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if (ctrl_link_mask && !(ctrl_link_mask & BIT(i))) {
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dev_dbg(&adev->dev,
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"Link %d masked, will not be enabled\n", i);
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continue;
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}
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if (!is_link_enabled(acpi_fwnode_handle(adev), i)) {
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dev_dbg(&adev->dev,
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"Link %d not selected in firmware\n", i);
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continue;
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}
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info->link_mask |= BIT(i);
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}
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return 0;
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}
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#define HDA_DSP_REG_ADSPIC2 (0x10)
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#define HDA_DSP_REG_ADSPIS2 (0x14)
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#define HDA_DSP_REG_ADSPIC2_SNDW BIT(5)
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/**
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* sdw_intel_enable_irq() - enable/disable Intel SoundWire IRQ
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* @mmio_base: The mmio base of the control register
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* @enable: true if enable
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*/
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void sdw_intel_enable_irq(void __iomem *mmio_base, bool enable)
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{
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u32 val;
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val = readl(mmio_base + HDA_DSP_REG_ADSPIC2);
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if (enable)
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val |= HDA_DSP_REG_ADSPIC2_SNDW;
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else
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val &= ~HDA_DSP_REG_ADSPIC2_SNDW;
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writel(val, mmio_base + HDA_DSP_REG_ADSPIC2);
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}
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EXPORT_SYMBOL_NS(sdw_intel_enable_irq, SOUNDWIRE_INTEL_INIT);
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irqreturn_t sdw_intel_thread(int irq, void *dev_id)
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{
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struct sdw_intel_ctx *ctx = dev_id;
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struct sdw_intel_link_res *link;
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list_for_each_entry(link, &ctx->link_list, list)
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sdw_cdns_irq(irq, link->cdns);
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sdw_intel_enable_irq(ctx->mmio_base, true);
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return IRQ_HANDLED;
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}
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EXPORT_SYMBOL_NS(sdw_intel_thread, SOUNDWIRE_INTEL_INIT);
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static struct sdw_intel_ctx
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*sdw_intel_probe_controller(struct sdw_intel_res *res)
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{
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struct platform_device_info pdevinfo;
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struct platform_device *pdev;
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struct sdw_intel_link_res *link;
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struct sdw_intel_ctx *ctx;
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struct acpi_device *adev;
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struct sdw_slave *slave;
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struct list_head *node;
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struct sdw_bus *bus;
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u32 link_mask;
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int num_slaves = 0;
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int count;
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int i;
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if (!res)
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return NULL;
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if (acpi_bus_get_device(res->handle, &adev))
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return NULL;
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if (!res->count)
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return NULL;
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count = res->count;
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dev_dbg(&adev->dev, "Creating %d SDW Link devices\n", count);
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ctx = devm_kzalloc(&adev->dev, sizeof(*ctx), GFP_KERNEL);
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if (!ctx)
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return NULL;
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ctx->count = count;
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ctx->links = devm_kcalloc(&adev->dev, ctx->count,
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sizeof(*ctx->links), GFP_KERNEL);
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if (!ctx->links)
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return NULL;
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ctx->count = count;
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ctx->mmio_base = res->mmio_base;
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ctx->link_mask = res->link_mask;
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ctx->handle = res->handle;
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mutex_init(&ctx->shim_lock);
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link = ctx->links;
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link_mask = ctx->link_mask;
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INIT_LIST_HEAD(&ctx->link_list);
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/* Create SDW Master devices */
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for (i = 0; i < count; i++, link++) {
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if (!(link_mask & BIT(i))) {
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dev_dbg(&adev->dev,
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"Link %d masked, will not be enabled\n", i);
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continue;
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}
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link->mmio_base = res->mmio_base;
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link->registers = res->mmio_base + SDW_LINK_BASE
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+ (SDW_LINK_SIZE * i);
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link->shim = res->mmio_base + SDW_SHIM_BASE;
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link->alh = res->mmio_base + SDW_ALH_BASE;
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link->ops = res->ops;
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link->dev = res->dev;
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link->shim_lock = &ctx->shim_lock;
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link->shim_mask = &ctx->shim_mask;
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memset(&pdevinfo, 0, sizeof(pdevinfo));
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pdevinfo.parent = res->parent;
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pdevinfo.name = "intel-sdw";
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pdevinfo.id = i;
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pdevinfo.fwnode = acpi_fwnode_handle(adev);
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pdevinfo.data = link;
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pdevinfo.size_data = sizeof(*link);
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pdev = platform_device_register_full(&pdevinfo);
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if (IS_ERR(pdev)) {
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dev_err(&adev->dev,
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"platform device creation failed: %ld\n",
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PTR_ERR(pdev));
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goto err;
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}
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link->pdev = pdev;
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link->cdns = platform_get_drvdata(pdev);
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list_add_tail(&link->list, &ctx->link_list);
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bus = &link->cdns->bus;
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/* Calculate number of slaves */
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list_for_each(node, &bus->slaves)
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num_slaves++;
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}
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ctx->ids = devm_kcalloc(&adev->dev, num_slaves,
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sizeof(*ctx->ids), GFP_KERNEL);
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if (!ctx->ids)
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goto err;
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ctx->num_slaves = num_slaves;
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i = 0;
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list_for_each_entry(link, &ctx->link_list, list) {
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bus = &link->cdns->bus;
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list_for_each_entry(slave, &bus->slaves, node) {
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ctx->ids[i].id = slave->id;
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ctx->ids[i].link_id = bus->link_id;
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i++;
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}
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}
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return ctx;
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err:
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ctx->count = i;
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sdw_intel_cleanup(ctx);
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return NULL;
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}
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static int
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sdw_intel_startup_controller(struct sdw_intel_ctx *ctx)
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{
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struct acpi_device *adev;
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struct sdw_intel_link_res *link;
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u32 caps;
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u32 link_mask;
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int i;
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if (acpi_bus_get_device(ctx->handle, &adev))
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return -EINVAL;
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/* Check SNDWLCAP.LCOUNT */
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caps = ioread32(ctx->mmio_base + SDW_SHIM_BASE + SDW_SHIM_LCAP);
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caps &= GENMASK(2, 0);
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/* Check HW supported vs property value */
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if (caps < ctx->count) {
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dev_err(&adev->dev,
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"BIOS master count is larger than hardware capabilities\n");
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return -EINVAL;
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}
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if (!ctx->links)
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return -EINVAL;
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link = ctx->links;
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link_mask = ctx->link_mask;
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/* Startup SDW Master devices */
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for (i = 0; i < ctx->count; i++, link++) {
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if (!(link_mask & BIT(i)))
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continue;
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intel_master_startup(link->pdev);
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}
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return 0;
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}
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static acpi_status sdw_intel_acpi_cb(acpi_handle handle, u32 level,
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void *cdata, void **return_value)
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{
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struct sdw_intel_acpi_info *info = cdata;
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struct acpi_device *adev;
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acpi_status status;
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u64 adr;
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status = acpi_evaluate_integer(handle, METHOD_NAME__ADR, NULL, &adr);
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if (ACPI_FAILURE(status))
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return AE_OK; /* keep going */
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if (acpi_bus_get_device(handle, &adev)) {
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pr_err("%s: Couldn't find ACPI handle\n", __func__);
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return AE_NOT_FOUND;
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}
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info->handle = handle;
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/*
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* On some Intel platforms, multiple children of the HDAS
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* device can be found, but only one of them is the SoundWire
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* controller. The SNDW device is always exposed with
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* Name(_ADR, 0x40000000), with bits 31..28 representing the
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* SoundWire link so filter accordingly
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*/
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if ((adr & GENMASK(31, 28)) >> 28 != SDW_LINK_TYPE)
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return AE_OK; /* keep going */
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/* device found, stop namespace walk */
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return AE_CTRL_TERMINATE;
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}
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/**
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* sdw_intel_acpi_scan() - SoundWire Intel init routine
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* @parent_handle: ACPI parent handle
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* @info: description of what firmware/DSDT tables expose
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*
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* This scans the namespace and queries firmware to figure out which
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* links to enable. A follow-up use of sdw_intel_probe() and
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* sdw_intel_startup() is required for creation of devices and bus
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* startup
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*/
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int sdw_intel_acpi_scan(acpi_handle *parent_handle,
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struct sdw_intel_acpi_info *info)
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{
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acpi_status status;
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status = acpi_walk_namespace(ACPI_TYPE_DEVICE,
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parent_handle, 1,
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sdw_intel_acpi_cb,
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NULL, info, NULL);
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if (ACPI_FAILURE(status))
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return -ENODEV;
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return sdw_intel_scan_controller(info);
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}
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EXPORT_SYMBOL_NS(sdw_intel_acpi_scan, SOUNDWIRE_INTEL_INIT);
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/**
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* sdw_intel_probe() - SoundWire Intel probe routine
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* @res: resource data
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*
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* This registers a platform device for each Master handled by the controller,
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* and SoundWire Master and Slave devices will be created by the platform
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* device probe. All the information necessary is stored in the context, and
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* the res argument pointer can be freed after this step.
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* This function will be called after sdw_intel_acpi_scan() by SOF probe.
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*/
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struct sdw_intel_ctx
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*sdw_intel_probe(struct sdw_intel_res *res)
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{
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return sdw_intel_probe_controller(res);
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}
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EXPORT_SYMBOL_NS(sdw_intel_probe, SOUNDWIRE_INTEL_INIT);
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/**
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* sdw_intel_startup() - SoundWire Intel startup
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* @ctx: SoundWire context allocated in the probe
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*
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* Startup Intel SoundWire controller. This function will be called after
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* Intel Audio DSP is powered up.
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*/
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int sdw_intel_startup(struct sdw_intel_ctx *ctx)
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{
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return sdw_intel_startup_controller(ctx);
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}
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EXPORT_SYMBOL_NS(sdw_intel_startup, SOUNDWIRE_INTEL_INIT);
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/**
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* sdw_intel_exit() - SoundWire Intel exit
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* @ctx: SoundWire context allocated in the probe
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*
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* Delete the controller instances created and cleanup
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*/
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void sdw_intel_exit(struct sdw_intel_ctx *ctx)
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{
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sdw_intel_cleanup(ctx);
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}
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EXPORT_SYMBOL_NS(sdw_intel_exit, SOUNDWIRE_INTEL_INIT);
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void sdw_intel_process_wakeen_event(struct sdw_intel_ctx *ctx)
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{
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struct sdw_intel_link_res *link;
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u32 link_mask;
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int i;
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if (!ctx->links)
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return;
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link = ctx->links;
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link_mask = ctx->link_mask;
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/* Startup SDW Master devices */
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for (i = 0; i < ctx->count; i++, link++) {
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if (!(link_mask & BIT(i)))
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continue;
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intel_master_process_wakeen_event(link->pdev);
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}
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}
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EXPORT_SYMBOL_NS(sdw_intel_process_wakeen_event, SOUNDWIRE_INTEL_INIT);
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MODULE_LICENSE("Dual BSD/GPL");
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MODULE_DESCRIPTION("Intel Soundwire Init Library");
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