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Reviewed-by: Jason Gunthorpe <jason.gunthorpe@obsidianresearch.com> Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com> Signed-off-by: Peter Huewe <peterhuewe@gmx.de>
35 lines
1.0 KiB
Plaintext
35 lines
1.0 KiB
Plaintext
* STMicroelectronics SAS. ST33ZP24 TPM SoC
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Required properties:
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- compatible: Should be "st,st33zp24-spi".
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- spi-max-frequency: Maximum SPI frequency (<= 10000000).
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Optional ST33ZP24 Properties:
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- interrupt-parent: phandle for the interrupt gpio controller
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- interrupts: GPIO interrupt to which the chip is connected
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- lpcpd-gpios: Output GPIO pin used for ST33ZP24 power management D1/D2 state.
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If set, power must be present when the platform is going into sleep/hibernate mode.
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Optional SoC Specific Properties:
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- pinctrl-names: Contains only one value - "default".
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- pintctrl-0: Specifies the pin control groups used for this controller.
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Example (for ARM-based BeagleBoard xM with ST33ZP24 on SPI4):
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&mcspi4 {
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status = "okay";
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st33zp24@0 {
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compatible = "st,st33zp24-spi";
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spi-max-frequency = <10000000>;
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interrupt-parent = <&gpio5>;
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interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
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lpcpd-gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>;
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};
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};
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