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Create a new driver for the da8xx DDR2/mDDR controller and implement support for writing to the Peripheral Bus Burst Priority Register. Reviewed-by: Kevin Hilman <khilman@baylibre.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> [nsekhar@ti.com: subject line adjustment] Signed-off-by: Sekhar Nori <nsekhar@ti.com>
21 lines
628 B
Plaintext
21 lines
628 B
Plaintext
* Device tree bindings for Texas Instruments da8xx DDR2/mDDR memory controller
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The DDR2/mDDR memory controller present on Texas Instruments da8xx SoCs features
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a set of registers which allow to tweak the controller's behavior.
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Documentation:
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OMAP-L138 (DA850) - http://www.ti.com/lit/ug/spruh82c/spruh82c.pdf
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Required properties:
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- compatible: "ti,da850-ddr-controller" - for da850 SoC based boards
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- reg: a tuple containing the base address of the memory
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controller and the size of the memory area to map
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Example for da850 shown below.
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ddrctl {
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compatible = "ti,da850-ddr-controller";
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reg = <0xb0000000 0xe8>;
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};
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