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96c3c9e78f
This change is required after the e6500 perf support has been added. There are 6 counters in e6500 core instead of 4 in e500 core and the MAX_HWEVENTS counter should be changed accordingly from 4 to 6. Added also runtime check for counters overflow. Signed-off-by: Catalin Udma <catalin.udma@freescale.com> Signed-off-by: Lijun Pan <Lijun.Pan@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> |
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.. | ||
bhrb.S | ||
callchain.c | ||
core-book3s.c | ||
core-fsl-emb.c | ||
e500-pmu.c | ||
Makefile | ||
mpc7450-pmu.c | ||
power4-pmu.c | ||
power5-pmu.c | ||
power5+-pmu.c | ||
power6-pmu.c | ||
power7-pmu.c | ||
power8-pmu.c | ||
ppc970-pmu.c |