..
asm-offsets.h
asm-prototypes.h
asm.h
atomic.h
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 36
2019-05-24 17:27:11 +02:00
barrier.h
bitops.h
bug.h
riscv: Add the support for c.ebreak check in is_valid_bugaddr()
2019-05-16 20:42:12 -07:00
cache.h
cacheflush.h
riscv: move flush_icache_{all,mm} to cacheflush.c
2019-05-16 20:42:12 -07:00
cmpxchg.h
csr.h
RISC-V: Access CSRs using CSR numbers
2019-05-16 20:42:11 -07:00
current.h
delay.h
elf.h
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152
2019-05-30 11:26:32 -07:00
fence.h
fixmap.h
RISC-V: Fix FIXMAP_TOP to avoid overlap with VMALLOC area
2019-03-28 23:16:04 -07:00
ftrace.h
futex.h
riscv: remove CONFIG_RISCV_ISA_A
2019-04-25 14:51:10 -07:00
hwcap.h
io.h
riscv/mmiowb: Hook up mmwiob() implementation to asm-generic code
2019-04-08 12:00:40 +01:00
irq.h
irqflags.h
RISC-V: Access CSRs using CSR numbers
2019-05-16 20:42:11 -07:00
Kbuild
treewide: Add SPDX license identifier - Kbuild
2019-05-30 11:32:33 -07:00
kprobes.h
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174
2019-05-30 11:26:41 -07:00
linkage.h
mmiowb.h
riscv/mmiowb: Hook up mmwiob() implementation to asm-generic code
2019-04-08 12:00:40 +01:00
mmu_context.h
riscv: move switch_mm to its own file
2019-05-16 20:42:12 -07:00
mmu.h
module.h
RISC-V: Support MODULE_SECTIONS mechanism on RV32
2019-01-07 08:19:20 -08:00
page.h
RISC-V: asm/page.h: fix spelling mistake "CONFIG_64BITS" -> "CONFIG_64BIT"
2019-01-23 12:56:20 -08:00
pci.h
perf_event.h
pgalloc.h
mm: treewide: remove unused address argument from pte_alloc functions
2019-01-04 13:13:47 -08:00
pgtable-32.h
pgtable-64.h
pgtable-bits.h
riscv: Add pte bit to distinguish swap from invalid
2019-02-11 15:24:45 -08:00
pgtable.h
RISC-V: Move setup_bootmem() to mm/init.c
2019-02-21 11:25:49 +05:30
processor.h
riscv: Adjust mmap base address at a third of task size
2019-01-25 10:50:53 -08:00
ptrace.h
riscv: remove duplicate macros from ptrace.h
2019-04-25 14:51:11 -07:00
sbi.h
riscv: fix sbi_remote_sfence_vma{,_asid}.
2019-05-16 20:42:12 -07:00
sifive_l2_cache.h
RISC-V: sifive_l2_cache: Add L2 cache controller driver for SiFive SoCs
2019-05-16 20:42:13 -07:00
smp.h
RISC-V: Move cpuid to hartid mapping to SMP.
2019-03-04 10:40:38 -08:00
spinlock_types.h
spinlock.h
string.h
switch_to.h
syscall.h
audit/stable-5.2 PR 20190507
2019-05-07 19:06:04 -07:00
thread_info.h
riscv: turn mm_segment_t into a struct
2019-04-25 14:51:10 -07:00
timex.h
tlb.h
asm-generic/tlb, arch: Provide generic tlb_flush() based on flush_tlb_range()
2019-04-03 10:32:42 +02:00
tlbflush.h
uaccess.h
riscv: remove unreachable big endian code
2019-04-25 14:51:10 -07:00
unistd.h
riscv: define NR_syscalls in unistd.h
2019-01-07 08:22:41 -08:00
vdso.h
word-at-a-time.h
96ac6d4351