mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-05 17:36:40 +07:00
0f0d84e52c
Since macb is a chip-internal device, use __raw_readl and __raw_writel instead of readl/writel. This will perform native-endian accesses, which is the right thing to do on both AVR32 and ARM devices. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
1211 lines
28 KiB
C
1211 lines
28 KiB
C
/*
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* Atmel MACB Ethernet Controller driver
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*
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* Copyright (C) 2004-2006 Atmel Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/clk.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/slab.h>
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#include <linux/init.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/mii.h>
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#include <linux/mutex.h>
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#include <linux/dma-mapping.h>
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#include <linux/ethtool.h>
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#include <linux/platform_device.h>
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#include <asm/arch/board.h>
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#include "macb.h"
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#define to_net_dev(class) container_of(class, struct net_device, class_dev)
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#define RX_BUFFER_SIZE 128
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#define RX_RING_SIZE 512
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#define RX_RING_BYTES (sizeof(struct dma_desc) * RX_RING_SIZE)
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/* Make the IP header word-aligned (the ethernet header is 14 bytes) */
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#define RX_OFFSET 2
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#define TX_RING_SIZE 128
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#define DEF_TX_RING_PENDING (TX_RING_SIZE - 1)
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#define TX_RING_BYTES (sizeof(struct dma_desc) * TX_RING_SIZE)
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#define TX_RING_GAP(bp) \
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(TX_RING_SIZE - (bp)->tx_pending)
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#define TX_BUFFS_AVAIL(bp) \
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(((bp)->tx_tail <= (bp)->tx_head) ? \
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(bp)->tx_tail + (bp)->tx_pending - (bp)->tx_head : \
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(bp)->tx_tail - (bp)->tx_head - TX_RING_GAP(bp))
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#define NEXT_TX(n) (((n) + 1) & (TX_RING_SIZE - 1))
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#define NEXT_RX(n) (((n) + 1) & (RX_RING_SIZE - 1))
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/* minimum number of free TX descriptors before waking up TX process */
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#define MACB_TX_WAKEUP_THRESH (TX_RING_SIZE / 4)
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#define MACB_RX_INT_FLAGS (MACB_BIT(RCOMP) | MACB_BIT(RXUBR) \
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| MACB_BIT(ISR_ROVR))
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static void __macb_set_hwaddr(struct macb *bp)
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{
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u32 bottom;
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u16 top;
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bottom = cpu_to_le32(*((u32 *)bp->dev->dev_addr));
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macb_writel(bp, SA1B, bottom);
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top = cpu_to_le16(*((u16 *)(bp->dev->dev_addr + 4)));
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macb_writel(bp, SA1T, top);
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}
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static void __init macb_get_hwaddr(struct macb *bp)
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{
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u32 bottom;
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u16 top;
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u8 addr[6];
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bottom = macb_readl(bp, SA1B);
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top = macb_readl(bp, SA1T);
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addr[0] = bottom & 0xff;
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addr[1] = (bottom >> 8) & 0xff;
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addr[2] = (bottom >> 16) & 0xff;
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addr[3] = (bottom >> 24) & 0xff;
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addr[4] = top & 0xff;
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addr[5] = (top >> 8) & 0xff;
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if (is_valid_ether_addr(addr))
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memcpy(bp->dev->dev_addr, addr, sizeof(addr));
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}
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static void macb_enable_mdio(struct macb *bp)
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{
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unsigned long flags;
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u32 reg;
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spin_lock_irqsave(&bp->lock, flags);
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reg = macb_readl(bp, NCR);
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reg |= MACB_BIT(MPE);
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macb_writel(bp, NCR, reg);
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macb_writel(bp, IER, MACB_BIT(MFD));
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spin_unlock_irqrestore(&bp->lock, flags);
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}
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static void macb_disable_mdio(struct macb *bp)
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{
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unsigned long flags;
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u32 reg;
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spin_lock_irqsave(&bp->lock, flags);
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reg = macb_readl(bp, NCR);
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reg &= ~MACB_BIT(MPE);
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macb_writel(bp, NCR, reg);
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macb_writel(bp, IDR, MACB_BIT(MFD));
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spin_unlock_irqrestore(&bp->lock, flags);
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}
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static int macb_mdio_read(struct net_device *dev, int phy_id, int location)
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{
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struct macb *bp = netdev_priv(dev);
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int value;
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mutex_lock(&bp->mdio_mutex);
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macb_enable_mdio(bp);
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macb_writel(bp, MAN, (MACB_BF(SOF, MACB_MAN_SOF)
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| MACB_BF(RW, MACB_MAN_READ)
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| MACB_BF(PHYA, phy_id)
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| MACB_BF(REGA, location)
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| MACB_BF(CODE, MACB_MAN_CODE)));
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wait_for_completion(&bp->mdio_complete);
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value = MACB_BFEXT(DATA, macb_readl(bp, MAN));
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macb_disable_mdio(bp);
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mutex_unlock(&bp->mdio_mutex);
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return value;
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}
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static void macb_mdio_write(struct net_device *dev, int phy_id,
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int location, int val)
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{
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struct macb *bp = netdev_priv(dev);
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dev_dbg(&bp->pdev->dev, "mdio_write %02x:%02x <- %04x\n",
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phy_id, location, val);
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mutex_lock(&bp->mdio_mutex);
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macb_enable_mdio(bp);
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macb_writel(bp, MAN, (MACB_BF(SOF, MACB_MAN_SOF)
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| MACB_BF(RW, MACB_MAN_WRITE)
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| MACB_BF(PHYA, phy_id)
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| MACB_BF(REGA, location)
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| MACB_BF(CODE, MACB_MAN_CODE)
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| MACB_BF(DATA, val)));
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wait_for_completion(&bp->mdio_complete);
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macb_disable_mdio(bp);
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mutex_unlock(&bp->mdio_mutex);
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}
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static int macb_phy_probe(struct macb *bp)
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{
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int phy_address;
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u16 phyid1, phyid2;
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for (phy_address = 0; phy_address < 32; phy_address++) {
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phyid1 = macb_mdio_read(bp->dev, phy_address, MII_PHYSID1);
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phyid2 = macb_mdio_read(bp->dev, phy_address, MII_PHYSID2);
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if (phyid1 != 0xffff && phyid1 != 0x0000
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&& phyid2 != 0xffff && phyid2 != 0x0000)
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break;
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}
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if (phy_address == 32)
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return -ENODEV;
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dev_info(&bp->pdev->dev,
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"detected PHY at address %d (ID %04x:%04x)\n",
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phy_address, phyid1, phyid2);
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bp->mii.phy_id = phy_address;
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return 0;
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}
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static void macb_set_media(struct macb *bp, int media)
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{
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u32 reg;
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spin_lock_irq(&bp->lock);
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reg = macb_readl(bp, NCFGR);
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reg &= ~(MACB_BIT(SPD) | MACB_BIT(FD));
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if (media & (ADVERTISE_100HALF | ADVERTISE_100FULL))
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reg |= MACB_BIT(SPD);
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if (media & ADVERTISE_FULL)
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reg |= MACB_BIT(FD);
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macb_writel(bp, NCFGR, reg);
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spin_unlock_irq(&bp->lock);
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}
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static void macb_check_media(struct macb *bp, int ok_to_print, int init_media)
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{
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struct mii_if_info *mii = &bp->mii;
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unsigned int old_carrier, new_carrier;
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int advertise, lpa, media, duplex;
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/* if forced media, go no further */
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if (mii->force_media)
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return;
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/* check current and old link status */
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old_carrier = netif_carrier_ok(mii->dev) ? 1 : 0;
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new_carrier = (unsigned int) mii_link_ok(mii);
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/* if carrier state did not change, assume nothing else did */
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if (!init_media && old_carrier == new_carrier)
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return;
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/* no carrier, nothing much to do */
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if (!new_carrier) {
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netif_carrier_off(mii->dev);
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printk(KERN_INFO "%s: link down\n", mii->dev->name);
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return;
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}
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/*
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* we have carrier, see who's on the other end
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*/
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netif_carrier_on(mii->dev);
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/* get MII advertise and LPA values */
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if (!init_media && mii->advertising) {
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advertise = mii->advertising;
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} else {
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advertise = mii->mdio_read(mii->dev, mii->phy_id, MII_ADVERTISE);
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mii->advertising = advertise;
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}
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lpa = mii->mdio_read(mii->dev, mii->phy_id, MII_LPA);
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/* figure out media and duplex from advertise and LPA values */
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media = mii_nway_result(lpa & advertise);
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duplex = (media & ADVERTISE_FULL) ? 1 : 0;
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if (ok_to_print)
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printk(KERN_INFO "%s: link up, %sMbps, %s-duplex, lpa 0x%04X\n",
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mii->dev->name,
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media & (ADVERTISE_100FULL | ADVERTISE_100HALF) ? "100" : "10",
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duplex ? "full" : "half", lpa);
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mii->full_duplex = duplex;
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/* Let the MAC know about the new link state */
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macb_set_media(bp, media);
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}
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static void macb_update_stats(struct macb *bp)
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{
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u32 __iomem *reg = bp->regs + MACB_PFR;
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u32 *p = &bp->hw_stats.rx_pause_frames;
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u32 *end = &bp->hw_stats.tx_pause_frames + 1;
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WARN_ON((unsigned long)(end - p - 1) != (MACB_TPF - MACB_PFR) / 4);
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for(; p < end; p++, reg++)
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*p += __raw_readl(reg);
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}
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static void macb_periodic_task(struct work_struct *work)
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{
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struct macb *bp = container_of(work, struct macb, periodic_task.work);
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macb_update_stats(bp);
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macb_check_media(bp, 1, 0);
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schedule_delayed_work(&bp->periodic_task, HZ);
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}
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static void macb_tx(struct macb *bp)
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{
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unsigned int tail;
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unsigned int head;
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u32 status;
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status = macb_readl(bp, TSR);
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macb_writel(bp, TSR, status);
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dev_dbg(&bp->pdev->dev, "macb_tx status = %02lx\n",
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(unsigned long)status);
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if (status & MACB_BIT(UND)) {
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printk(KERN_ERR "%s: TX underrun, resetting buffers\n",
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bp->dev->name);
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bp->tx_head = bp->tx_tail = 0;
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}
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if (!(status & MACB_BIT(COMP)))
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/*
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* This may happen when a buffer becomes complete
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* between reading the ISR and scanning the
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* descriptors. Nothing to worry about.
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*/
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return;
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head = bp->tx_head;
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for (tail = bp->tx_tail; tail != head; tail = NEXT_TX(tail)) {
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struct ring_info *rp = &bp->tx_skb[tail];
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struct sk_buff *skb = rp->skb;
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u32 bufstat;
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BUG_ON(skb == NULL);
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rmb();
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bufstat = bp->tx_ring[tail].ctrl;
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if (!(bufstat & MACB_BIT(TX_USED)))
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break;
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dev_dbg(&bp->pdev->dev, "skb %u (data %p) TX complete\n",
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tail, skb->data);
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dma_unmap_single(&bp->pdev->dev, rp->mapping, skb->len,
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DMA_TO_DEVICE);
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bp->stats.tx_packets++;
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bp->stats.tx_bytes += skb->len;
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rp->skb = NULL;
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dev_kfree_skb_irq(skb);
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}
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bp->tx_tail = tail;
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if (netif_queue_stopped(bp->dev) &&
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TX_BUFFS_AVAIL(bp) > MACB_TX_WAKEUP_THRESH)
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netif_wake_queue(bp->dev);
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}
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static int macb_rx_frame(struct macb *bp, unsigned int first_frag,
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unsigned int last_frag)
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{
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unsigned int len;
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unsigned int frag;
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unsigned int offset = 0;
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struct sk_buff *skb;
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len = MACB_BFEXT(RX_FRMLEN, bp->rx_ring[last_frag].ctrl);
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dev_dbg(&bp->pdev->dev, "macb_rx_frame frags %u - %u (len %u)\n",
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first_frag, last_frag, len);
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skb = dev_alloc_skb(len + RX_OFFSET);
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if (!skb) {
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bp->stats.rx_dropped++;
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for (frag = first_frag; ; frag = NEXT_RX(frag)) {
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bp->rx_ring[frag].addr &= ~MACB_BIT(RX_USED);
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if (frag == last_frag)
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break;
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}
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wmb();
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return 1;
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}
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skb_reserve(skb, RX_OFFSET);
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skb->dev = bp->dev;
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skb->ip_summed = CHECKSUM_NONE;
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skb_put(skb, len);
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for (frag = first_frag; ; frag = NEXT_RX(frag)) {
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unsigned int frag_len = RX_BUFFER_SIZE;
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if (offset + frag_len > len) {
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BUG_ON(frag != last_frag);
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frag_len = len - offset;
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}
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memcpy(skb->data + offset,
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bp->rx_buffers + (RX_BUFFER_SIZE * frag),
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frag_len);
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offset += RX_BUFFER_SIZE;
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bp->rx_ring[frag].addr &= ~MACB_BIT(RX_USED);
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wmb();
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if (frag == last_frag)
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break;
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}
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skb->protocol = eth_type_trans(skb, bp->dev);
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bp->stats.rx_packets++;
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bp->stats.rx_bytes += len;
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bp->dev->last_rx = jiffies;
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dev_dbg(&bp->pdev->dev, "received skb of length %u, csum: %08x\n",
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skb->len, skb->csum);
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netif_receive_skb(skb);
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return 0;
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}
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/* Mark DMA descriptors from begin up to and not including end as unused */
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static void discard_partial_frame(struct macb *bp, unsigned int begin,
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unsigned int end)
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{
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unsigned int frag;
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for (frag = begin; frag != end; frag = NEXT_RX(frag))
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bp->rx_ring[frag].addr &= ~MACB_BIT(RX_USED);
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wmb();
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/*
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* When this happens, the hardware stats registers for
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* whatever caused this is updated, so we don't have to record
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* anything.
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*/
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}
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static int macb_rx(struct macb *bp, int budget)
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{
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int received = 0;
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unsigned int tail = bp->rx_tail;
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int first_frag = -1;
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for (; budget > 0; tail = NEXT_RX(tail)) {
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u32 addr, ctrl;
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rmb();
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addr = bp->rx_ring[tail].addr;
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ctrl = bp->rx_ring[tail].ctrl;
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|
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if (!(addr & MACB_BIT(RX_USED)))
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break;
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|
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if (ctrl & MACB_BIT(RX_SOF)) {
|
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if (first_frag != -1)
|
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discard_partial_frame(bp, first_frag, tail);
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first_frag = tail;
|
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}
|
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|
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if (ctrl & MACB_BIT(RX_EOF)) {
|
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int dropped;
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BUG_ON(first_frag == -1);
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|
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dropped = macb_rx_frame(bp, first_frag, tail);
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first_frag = -1;
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if (!dropped) {
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received++;
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budget--;
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}
|
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}
|
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}
|
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|
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if (first_frag != -1)
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bp->rx_tail = first_frag;
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else
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bp->rx_tail = tail;
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return received;
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}
|
|
|
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static int macb_poll(struct net_device *dev, int *budget)
|
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{
|
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struct macb *bp = netdev_priv(dev);
|
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int orig_budget, work_done, retval = 0;
|
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u32 status;
|
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|
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status = macb_readl(bp, RSR);
|
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macb_writel(bp, RSR, status);
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|
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if (!status) {
|
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/*
|
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* This may happen if an interrupt was pending before
|
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* this function was called last time, and no packets
|
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* have been received since.
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*/
|
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netif_rx_complete(dev);
|
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goto out;
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}
|
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|
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dev_dbg(&bp->pdev->dev, "poll: status = %08lx, budget = %d\n",
|
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(unsigned long)status, *budget);
|
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|
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if (!(status & MACB_BIT(REC))) {
|
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dev_warn(&bp->pdev->dev,
|
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"No RX buffers complete, status = %02lx\n",
|
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(unsigned long)status);
|
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netif_rx_complete(dev);
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goto out;
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}
|
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|
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orig_budget = *budget;
|
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if (orig_budget > dev->quota)
|
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orig_budget = dev->quota;
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|
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work_done = macb_rx(bp, orig_budget);
|
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if (work_done < orig_budget) {
|
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netif_rx_complete(dev);
|
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retval = 0;
|
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} else {
|
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retval = 1;
|
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}
|
|
|
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/*
|
|
* We've done what we can to clean the buffers. Make sure we
|
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* get notified when new packets arrive.
|
|
*/
|
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out:
|
|
macb_writel(bp, IER, MACB_RX_INT_FLAGS);
|
|
|
|
/* TODO: Handle errors */
|
|
|
|
return retval;
|
|
}
|
|
|
|
static irqreturn_t macb_interrupt(int irq, void *dev_id)
|
|
{
|
|
struct net_device *dev = dev_id;
|
|
struct macb *bp = netdev_priv(dev);
|
|
u32 status;
|
|
|
|
status = macb_readl(bp, ISR);
|
|
|
|
if (unlikely(!status))
|
|
return IRQ_NONE;
|
|
|
|
spin_lock(&bp->lock);
|
|
|
|
while (status) {
|
|
if (status & MACB_BIT(MFD))
|
|
complete(&bp->mdio_complete);
|
|
|
|
/* close possible race with dev_close */
|
|
if (unlikely(!netif_running(dev))) {
|
|
macb_writel(bp, IDR, ~0UL);
|
|
break;
|
|
}
|
|
|
|
if (status & MACB_RX_INT_FLAGS) {
|
|
if (netif_rx_schedule_prep(dev)) {
|
|
/*
|
|
* There's no point taking any more interrupts
|
|
* until we have processed the buffers
|
|
*/
|
|
macb_writel(bp, IDR, MACB_RX_INT_FLAGS);
|
|
dev_dbg(&bp->pdev->dev, "scheduling RX softirq\n");
|
|
__netif_rx_schedule(dev);
|
|
}
|
|
}
|
|
|
|
if (status & (MACB_BIT(TCOMP) | MACB_BIT(ISR_TUND)))
|
|
macb_tx(bp);
|
|
|
|
/*
|
|
* Link change detection isn't possible with RMII, so we'll
|
|
* add that if/when we get our hands on a full-blown MII PHY.
|
|
*/
|
|
|
|
if (status & MACB_BIT(HRESP)) {
|
|
/*
|
|
* TODO: Reset the hardware, and maybe move the printk
|
|
* to a lower-priority context as well (work queue?)
|
|
*/
|
|
printk(KERN_ERR "%s: DMA bus error: HRESP not OK\n",
|
|
dev->name);
|
|
}
|
|
|
|
status = macb_readl(bp, ISR);
|
|
}
|
|
|
|
spin_unlock(&bp->lock);
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static int macb_start_xmit(struct sk_buff *skb, struct net_device *dev)
|
|
{
|
|
struct macb *bp = netdev_priv(dev);
|
|
dma_addr_t mapping;
|
|
unsigned int len, entry;
|
|
u32 ctrl;
|
|
|
|
#ifdef DEBUG
|
|
int i;
|
|
dev_dbg(&bp->pdev->dev,
|
|
"start_xmit: len %u head %p data %p tail %p end %p\n",
|
|
skb->len, skb->head, skb->data, skb->tail, skb->end);
|
|
dev_dbg(&bp->pdev->dev,
|
|
"data:");
|
|
for (i = 0; i < 16; i++)
|
|
printk(" %02x", (unsigned int)skb->data[i]);
|
|
printk("\n");
|
|
#endif
|
|
|
|
len = skb->len;
|
|
spin_lock_irq(&bp->lock);
|
|
|
|
/* This is a hard error, log it. */
|
|
if (TX_BUFFS_AVAIL(bp) < 1) {
|
|
netif_stop_queue(dev);
|
|
spin_unlock_irq(&bp->lock);
|
|
dev_err(&bp->pdev->dev,
|
|
"BUG! Tx Ring full when queue awake!\n");
|
|
dev_dbg(&bp->pdev->dev, "tx_head = %u, tx_tail = %u\n",
|
|
bp->tx_head, bp->tx_tail);
|
|
return 1;
|
|
}
|
|
|
|
entry = bp->tx_head;
|
|
dev_dbg(&bp->pdev->dev, "Allocated ring entry %u\n", entry);
|
|
mapping = dma_map_single(&bp->pdev->dev, skb->data,
|
|
len, DMA_TO_DEVICE);
|
|
bp->tx_skb[entry].skb = skb;
|
|
bp->tx_skb[entry].mapping = mapping;
|
|
dev_dbg(&bp->pdev->dev, "Mapped skb data %p to DMA addr %08lx\n",
|
|
skb->data, (unsigned long)mapping);
|
|
|
|
ctrl = MACB_BF(TX_FRMLEN, len);
|
|
ctrl |= MACB_BIT(TX_LAST);
|
|
if (entry == (TX_RING_SIZE - 1))
|
|
ctrl |= MACB_BIT(TX_WRAP);
|
|
|
|
bp->tx_ring[entry].addr = mapping;
|
|
bp->tx_ring[entry].ctrl = ctrl;
|
|
wmb();
|
|
|
|
entry = NEXT_TX(entry);
|
|
bp->tx_head = entry;
|
|
|
|
macb_writel(bp, NCR, macb_readl(bp, NCR) | MACB_BIT(TSTART));
|
|
|
|
if (TX_BUFFS_AVAIL(bp) < 1)
|
|
netif_stop_queue(dev);
|
|
|
|
spin_unlock_irq(&bp->lock);
|
|
|
|
dev->trans_start = jiffies;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void macb_free_consistent(struct macb *bp)
|
|
{
|
|
if (bp->tx_skb) {
|
|
kfree(bp->tx_skb);
|
|
bp->tx_skb = NULL;
|
|
}
|
|
if (bp->rx_ring) {
|
|
dma_free_coherent(&bp->pdev->dev, RX_RING_BYTES,
|
|
bp->rx_ring, bp->rx_ring_dma);
|
|
bp->rx_ring = NULL;
|
|
}
|
|
if (bp->tx_ring) {
|
|
dma_free_coherent(&bp->pdev->dev, TX_RING_BYTES,
|
|
bp->tx_ring, bp->tx_ring_dma);
|
|
bp->tx_ring = NULL;
|
|
}
|
|
if (bp->rx_buffers) {
|
|
dma_free_coherent(&bp->pdev->dev,
|
|
RX_RING_SIZE * RX_BUFFER_SIZE,
|
|
bp->rx_buffers, bp->rx_buffers_dma);
|
|
bp->rx_buffers = NULL;
|
|
}
|
|
}
|
|
|
|
static int macb_alloc_consistent(struct macb *bp)
|
|
{
|
|
int size;
|
|
|
|
size = TX_RING_SIZE * sizeof(struct ring_info);
|
|
bp->tx_skb = kmalloc(size, GFP_KERNEL);
|
|
if (!bp->tx_skb)
|
|
goto out_err;
|
|
|
|
size = RX_RING_BYTES;
|
|
bp->rx_ring = dma_alloc_coherent(&bp->pdev->dev, size,
|
|
&bp->rx_ring_dma, GFP_KERNEL);
|
|
if (!bp->rx_ring)
|
|
goto out_err;
|
|
dev_dbg(&bp->pdev->dev,
|
|
"Allocated RX ring of %d bytes at %08lx (mapped %p)\n",
|
|
size, (unsigned long)bp->rx_ring_dma, bp->rx_ring);
|
|
|
|
size = TX_RING_BYTES;
|
|
bp->tx_ring = dma_alloc_coherent(&bp->pdev->dev, size,
|
|
&bp->tx_ring_dma, GFP_KERNEL);
|
|
if (!bp->tx_ring)
|
|
goto out_err;
|
|
dev_dbg(&bp->pdev->dev,
|
|
"Allocated TX ring of %d bytes at %08lx (mapped %p)\n",
|
|
size, (unsigned long)bp->tx_ring_dma, bp->tx_ring);
|
|
|
|
size = RX_RING_SIZE * RX_BUFFER_SIZE;
|
|
bp->rx_buffers = dma_alloc_coherent(&bp->pdev->dev, size,
|
|
&bp->rx_buffers_dma, GFP_KERNEL);
|
|
if (!bp->rx_buffers)
|
|
goto out_err;
|
|
dev_dbg(&bp->pdev->dev,
|
|
"Allocated RX buffers of %d bytes at %08lx (mapped %p)\n",
|
|
size, (unsigned long)bp->rx_buffers_dma, bp->rx_buffers);
|
|
|
|
return 0;
|
|
|
|
out_err:
|
|
macb_free_consistent(bp);
|
|
return -ENOMEM;
|
|
}
|
|
|
|
static void macb_init_rings(struct macb *bp)
|
|
{
|
|
int i;
|
|
dma_addr_t addr;
|
|
|
|
addr = bp->rx_buffers_dma;
|
|
for (i = 0; i < RX_RING_SIZE; i++) {
|
|
bp->rx_ring[i].addr = addr;
|
|
bp->rx_ring[i].ctrl = 0;
|
|
addr += RX_BUFFER_SIZE;
|
|
}
|
|
bp->rx_ring[RX_RING_SIZE - 1].addr |= MACB_BIT(RX_WRAP);
|
|
|
|
for (i = 0; i < TX_RING_SIZE; i++) {
|
|
bp->tx_ring[i].addr = 0;
|
|
bp->tx_ring[i].ctrl = MACB_BIT(TX_USED);
|
|
}
|
|
bp->tx_ring[TX_RING_SIZE - 1].ctrl |= MACB_BIT(TX_WRAP);
|
|
|
|
bp->rx_tail = bp->tx_head = bp->tx_tail = 0;
|
|
}
|
|
|
|
static void macb_reset_hw(struct macb *bp)
|
|
{
|
|
/* Make sure we have the write buffer for ourselves */
|
|
wmb();
|
|
|
|
/*
|
|
* Disable RX and TX (XXX: Should we halt the transmission
|
|
* more gracefully?)
|
|
*/
|
|
macb_writel(bp, NCR, 0);
|
|
|
|
/* Clear the stats registers (XXX: Update stats first?) */
|
|
macb_writel(bp, NCR, MACB_BIT(CLRSTAT));
|
|
|
|
/* Clear all status flags */
|
|
macb_writel(bp, TSR, ~0UL);
|
|
macb_writel(bp, RSR, ~0UL);
|
|
|
|
/* Disable all interrupts */
|
|
macb_writel(bp, IDR, ~0UL);
|
|
macb_readl(bp, ISR);
|
|
}
|
|
|
|
static void macb_init_hw(struct macb *bp)
|
|
{
|
|
u32 config;
|
|
|
|
macb_reset_hw(bp);
|
|
__macb_set_hwaddr(bp);
|
|
|
|
config = macb_readl(bp, NCFGR) & MACB_BF(CLK, -1L);
|
|
config |= MACB_BIT(PAE); /* PAuse Enable */
|
|
config |= MACB_BIT(DRFCS); /* Discard Rx FCS */
|
|
if (bp->dev->flags & IFF_PROMISC)
|
|
config |= MACB_BIT(CAF); /* Copy All Frames */
|
|
if (!(bp->dev->flags & IFF_BROADCAST))
|
|
config |= MACB_BIT(NBC); /* No BroadCast */
|
|
macb_writel(bp, NCFGR, config);
|
|
|
|
/* Initialize TX and RX buffers */
|
|
macb_writel(bp, RBQP, bp->rx_ring_dma);
|
|
macb_writel(bp, TBQP, bp->tx_ring_dma);
|
|
|
|
/* Enable TX and RX */
|
|
macb_writel(bp, NCR, MACB_BIT(RE) | MACB_BIT(TE));
|
|
|
|
/* Enable interrupts */
|
|
macb_writel(bp, IER, (MACB_BIT(RCOMP)
|
|
| MACB_BIT(RXUBR)
|
|
| MACB_BIT(ISR_TUND)
|
|
| MACB_BIT(ISR_RLE)
|
|
| MACB_BIT(TXERR)
|
|
| MACB_BIT(TCOMP)
|
|
| MACB_BIT(ISR_ROVR)
|
|
| MACB_BIT(HRESP)));
|
|
}
|
|
|
|
static void macb_init_phy(struct net_device *dev)
|
|
{
|
|
struct macb *bp = netdev_priv(dev);
|
|
|
|
/* Set some reasonable default settings */
|
|
macb_mdio_write(dev, bp->mii.phy_id, MII_ADVERTISE,
|
|
ADVERTISE_CSMA | ADVERTISE_ALL);
|
|
macb_mdio_write(dev, bp->mii.phy_id, MII_BMCR,
|
|
(BMCR_SPEED100 | BMCR_ANENABLE
|
|
| BMCR_ANRESTART | BMCR_FULLDPLX));
|
|
}
|
|
|
|
static int macb_open(struct net_device *dev)
|
|
{
|
|
struct macb *bp = netdev_priv(dev);
|
|
int err;
|
|
|
|
dev_dbg(&bp->pdev->dev, "open\n");
|
|
|
|
if (!is_valid_ether_addr(dev->dev_addr))
|
|
return -EADDRNOTAVAIL;
|
|
|
|
err = macb_alloc_consistent(bp);
|
|
if (err) {
|
|
printk(KERN_ERR
|
|
"%s: Unable to allocate DMA memory (error %d)\n",
|
|
dev->name, err);
|
|
return err;
|
|
}
|
|
|
|
macb_init_rings(bp);
|
|
macb_init_hw(bp);
|
|
macb_init_phy(dev);
|
|
|
|
macb_check_media(bp, 1, 1);
|
|
netif_start_queue(dev);
|
|
|
|
schedule_delayed_work(&bp->periodic_task, HZ);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int macb_close(struct net_device *dev)
|
|
{
|
|
struct macb *bp = netdev_priv(dev);
|
|
unsigned long flags;
|
|
|
|
cancel_rearming_delayed_work(&bp->periodic_task);
|
|
|
|
netif_stop_queue(dev);
|
|
|
|
spin_lock_irqsave(&bp->lock, flags);
|
|
macb_reset_hw(bp);
|
|
netif_carrier_off(dev);
|
|
spin_unlock_irqrestore(&bp->lock, flags);
|
|
|
|
macb_free_consistent(bp);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct net_device_stats *macb_get_stats(struct net_device *dev)
|
|
{
|
|
struct macb *bp = netdev_priv(dev);
|
|
struct net_device_stats *nstat = &bp->stats;
|
|
struct macb_stats *hwstat = &bp->hw_stats;
|
|
|
|
/* Convert HW stats into netdevice stats */
|
|
nstat->rx_errors = (hwstat->rx_fcs_errors +
|
|
hwstat->rx_align_errors +
|
|
hwstat->rx_resource_errors +
|
|
hwstat->rx_overruns +
|
|
hwstat->rx_oversize_pkts +
|
|
hwstat->rx_jabbers +
|
|
hwstat->rx_undersize_pkts +
|
|
hwstat->sqe_test_errors +
|
|
hwstat->rx_length_mismatch);
|
|
nstat->tx_errors = (hwstat->tx_late_cols +
|
|
hwstat->tx_excessive_cols +
|
|
hwstat->tx_underruns +
|
|
hwstat->tx_carrier_errors);
|
|
nstat->collisions = (hwstat->tx_single_cols +
|
|
hwstat->tx_multiple_cols +
|
|
hwstat->tx_excessive_cols);
|
|
nstat->rx_length_errors = (hwstat->rx_oversize_pkts +
|
|
hwstat->rx_jabbers +
|
|
hwstat->rx_undersize_pkts +
|
|
hwstat->rx_length_mismatch);
|
|
nstat->rx_over_errors = hwstat->rx_resource_errors;
|
|
nstat->rx_crc_errors = hwstat->rx_fcs_errors;
|
|
nstat->rx_frame_errors = hwstat->rx_align_errors;
|
|
nstat->rx_fifo_errors = hwstat->rx_overruns;
|
|
/* XXX: What does "missed" mean? */
|
|
nstat->tx_aborted_errors = hwstat->tx_excessive_cols;
|
|
nstat->tx_carrier_errors = hwstat->tx_carrier_errors;
|
|
nstat->tx_fifo_errors = hwstat->tx_underruns;
|
|
/* Don't know about heartbeat or window errors... */
|
|
|
|
return nstat;
|
|
}
|
|
|
|
static int macb_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
|
|
{
|
|
struct macb *bp = netdev_priv(dev);
|
|
int ret;
|
|
unsigned long flags;
|
|
|
|
spin_lock_irqsave(&bp->lock, flags);
|
|
ret = mii_ethtool_gset(&bp->mii, cmd);
|
|
spin_unlock_irqrestore(&bp->lock, flags);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int macb_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
|
|
{
|
|
struct macb *bp = netdev_priv(dev);
|
|
int ret;
|
|
unsigned long flags;
|
|
|
|
spin_lock_irqsave(&bp->lock, flags);
|
|
ret = mii_ethtool_sset(&bp->mii, cmd);
|
|
spin_unlock_irqrestore(&bp->lock, flags);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static void macb_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
|
|
{
|
|
struct macb *bp = netdev_priv(dev);
|
|
|
|
strcpy(info->driver, bp->pdev->dev.driver->name);
|
|
strcpy(info->version, "$Revision: 1.14 $");
|
|
strcpy(info->bus_info, bp->pdev->dev.bus_id);
|
|
}
|
|
|
|
static int macb_nway_reset(struct net_device *dev)
|
|
{
|
|
struct macb *bp = netdev_priv(dev);
|
|
return mii_nway_restart(&bp->mii);
|
|
}
|
|
|
|
static struct ethtool_ops macb_ethtool_ops = {
|
|
.get_settings = macb_get_settings,
|
|
.set_settings = macb_set_settings,
|
|
.get_drvinfo = macb_get_drvinfo,
|
|
.nway_reset = macb_nway_reset,
|
|
.get_link = ethtool_op_get_link,
|
|
};
|
|
|
|
static int macb_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
|
|
{
|
|
struct macb *bp = netdev_priv(dev);
|
|
int ret;
|
|
unsigned long flags;
|
|
|
|
if (!netif_running(dev))
|
|
return -EINVAL;
|
|
|
|
spin_lock_irqsave(&bp->lock, flags);
|
|
ret = generic_mii_ioctl(&bp->mii, if_mii(rq), cmd, NULL);
|
|
spin_unlock_irqrestore(&bp->lock, flags);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static ssize_t macb_mii_show(const struct class_device *cd, char *buf,
|
|
unsigned long addr)
|
|
{
|
|
struct net_device *dev = to_net_dev(cd);
|
|
struct macb *bp = netdev_priv(dev);
|
|
ssize_t ret = -EINVAL;
|
|
|
|
if (netif_running(dev)) {
|
|
int value;
|
|
value = macb_mdio_read(dev, bp->mii.phy_id, addr);
|
|
ret = sprintf(buf, "0x%04x\n", (uint16_t)value);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
#define MII_ENTRY(name, addr) \
|
|
static ssize_t show_##name(struct class_device *cd, char *buf) \
|
|
{ \
|
|
return macb_mii_show(cd, buf, addr); \
|
|
} \
|
|
static CLASS_DEVICE_ATTR(name, S_IRUGO, show_##name, NULL)
|
|
|
|
MII_ENTRY(bmcr, MII_BMCR);
|
|
MII_ENTRY(bmsr, MII_BMSR);
|
|
MII_ENTRY(physid1, MII_PHYSID1);
|
|
MII_ENTRY(physid2, MII_PHYSID2);
|
|
MII_ENTRY(advertise, MII_ADVERTISE);
|
|
MII_ENTRY(lpa, MII_LPA);
|
|
MII_ENTRY(expansion, MII_EXPANSION);
|
|
|
|
static struct attribute *macb_mii_attrs[] = {
|
|
&class_device_attr_bmcr.attr,
|
|
&class_device_attr_bmsr.attr,
|
|
&class_device_attr_physid1.attr,
|
|
&class_device_attr_physid2.attr,
|
|
&class_device_attr_advertise.attr,
|
|
&class_device_attr_lpa.attr,
|
|
&class_device_attr_expansion.attr,
|
|
NULL,
|
|
};
|
|
|
|
static struct attribute_group macb_mii_group = {
|
|
.name = "mii",
|
|
.attrs = macb_mii_attrs,
|
|
};
|
|
|
|
static void macb_unregister_sysfs(struct net_device *net)
|
|
{
|
|
struct class_device *class_dev = &net->class_dev;
|
|
|
|
sysfs_remove_group(&class_dev->kobj, &macb_mii_group);
|
|
}
|
|
|
|
static int macb_register_sysfs(struct net_device *net)
|
|
{
|
|
struct class_device *class_dev = &net->class_dev;
|
|
int ret;
|
|
|
|
ret = sysfs_create_group(&class_dev->kobj, &macb_mii_group);
|
|
if (ret)
|
|
printk(KERN_WARNING
|
|
"%s: sysfs mii attribute registration failed: %d\n",
|
|
net->name, ret);
|
|
return ret;
|
|
}
|
|
static int __devinit macb_probe(struct platform_device *pdev)
|
|
{
|
|
struct eth_platform_data *pdata;
|
|
struct resource *regs;
|
|
struct net_device *dev;
|
|
struct macb *bp;
|
|
unsigned long pclk_hz;
|
|
u32 config;
|
|
int err = -ENXIO;
|
|
|
|
regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
if (!regs) {
|
|
dev_err(&pdev->dev, "no mmio resource defined\n");
|
|
goto err_out;
|
|
}
|
|
|
|
err = -ENOMEM;
|
|
dev = alloc_etherdev(sizeof(*bp));
|
|
if (!dev) {
|
|
dev_err(&pdev->dev, "etherdev alloc failed, aborting.\n");
|
|
goto err_out;
|
|
}
|
|
|
|
SET_MODULE_OWNER(dev);
|
|
SET_NETDEV_DEV(dev, &pdev->dev);
|
|
|
|
/* TODO: Actually, we have some interesting features... */
|
|
dev->features |= 0;
|
|
|
|
bp = netdev_priv(dev);
|
|
bp->pdev = pdev;
|
|
bp->dev = dev;
|
|
|
|
spin_lock_init(&bp->lock);
|
|
|
|
bp->pclk = clk_get(&pdev->dev, "pclk");
|
|
if (IS_ERR(bp->pclk)) {
|
|
dev_err(&pdev->dev, "failed to get pclk\n");
|
|
goto err_out_free_dev;
|
|
}
|
|
bp->hclk = clk_get(&pdev->dev, "hclk");
|
|
if (IS_ERR(bp->hclk)) {
|
|
dev_err(&pdev->dev, "failed to get hclk\n");
|
|
goto err_out_put_pclk;
|
|
}
|
|
|
|
clk_enable(bp->pclk);
|
|
clk_enable(bp->hclk);
|
|
|
|
bp->regs = ioremap(regs->start, regs->end - regs->start + 1);
|
|
if (!bp->regs) {
|
|
dev_err(&pdev->dev, "failed to map registers, aborting.\n");
|
|
err = -ENOMEM;
|
|
goto err_out_disable_clocks;
|
|
}
|
|
|
|
dev->irq = platform_get_irq(pdev, 0);
|
|
err = request_irq(dev->irq, macb_interrupt, SA_SAMPLE_RANDOM,
|
|
dev->name, dev);
|
|
if (err) {
|
|
printk(KERN_ERR
|
|
"%s: Unable to request IRQ %d (error %d)\n",
|
|
dev->name, dev->irq, err);
|
|
goto err_out_iounmap;
|
|
}
|
|
|
|
dev->open = macb_open;
|
|
dev->stop = macb_close;
|
|
dev->hard_start_xmit = macb_start_xmit;
|
|
dev->get_stats = macb_get_stats;
|
|
dev->do_ioctl = macb_ioctl;
|
|
dev->poll = macb_poll;
|
|
dev->weight = 64;
|
|
dev->ethtool_ops = &macb_ethtool_ops;
|
|
|
|
dev->base_addr = regs->start;
|
|
|
|
INIT_DELAYED_WORK(&bp->periodic_task, macb_periodic_task);
|
|
mutex_init(&bp->mdio_mutex);
|
|
init_completion(&bp->mdio_complete);
|
|
|
|
/* Set MII management clock divider */
|
|
pclk_hz = clk_get_rate(bp->pclk);
|
|
if (pclk_hz <= 20000000)
|
|
config = MACB_BF(CLK, MACB_CLK_DIV8);
|
|
else if (pclk_hz <= 40000000)
|
|
config = MACB_BF(CLK, MACB_CLK_DIV16);
|
|
else if (pclk_hz <= 80000000)
|
|
config = MACB_BF(CLK, MACB_CLK_DIV32);
|
|
else
|
|
config = MACB_BF(CLK, MACB_CLK_DIV64);
|
|
macb_writel(bp, NCFGR, config);
|
|
|
|
bp->mii.dev = dev;
|
|
bp->mii.mdio_read = macb_mdio_read;
|
|
bp->mii.mdio_write = macb_mdio_write;
|
|
bp->mii.phy_id_mask = 0x1f;
|
|
bp->mii.reg_num_mask = 0x1f;
|
|
|
|
macb_get_hwaddr(bp);
|
|
err = macb_phy_probe(bp);
|
|
if (err) {
|
|
dev_err(&pdev->dev, "Failed to detect PHY, aborting.\n");
|
|
goto err_out_free_irq;
|
|
}
|
|
|
|
pdata = pdev->dev.platform_data;
|
|
if (pdata && pdata->is_rmii)
|
|
macb_writel(bp, USRIO, 0);
|
|
else
|
|
macb_writel(bp, USRIO, MACB_BIT(MII));
|
|
|
|
bp->tx_pending = DEF_TX_RING_PENDING;
|
|
|
|
err = register_netdev(dev);
|
|
if (err) {
|
|
dev_err(&pdev->dev, "Cannot register net device, aborting.\n");
|
|
goto err_out_free_irq;
|
|
}
|
|
|
|
platform_set_drvdata(pdev, dev);
|
|
|
|
macb_register_sysfs(dev);
|
|
|
|
printk(KERN_INFO "%s: Atmel MACB at 0x%08lx irq %d "
|
|
"(%02x:%02x:%02x:%02x:%02x:%02x)\n",
|
|
dev->name, dev->base_addr, dev->irq,
|
|
dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
|
|
dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
|
|
|
|
return 0;
|
|
|
|
err_out_free_irq:
|
|
free_irq(dev->irq, dev);
|
|
err_out_iounmap:
|
|
iounmap(bp->regs);
|
|
err_out_disable_clocks:
|
|
clk_disable(bp->hclk);
|
|
clk_disable(bp->pclk);
|
|
clk_put(bp->hclk);
|
|
err_out_put_pclk:
|
|
clk_put(bp->pclk);
|
|
err_out_free_dev:
|
|
free_netdev(dev);
|
|
err_out:
|
|
platform_set_drvdata(pdev, NULL);
|
|
return err;
|
|
}
|
|
|
|
static int __devexit macb_remove(struct platform_device *pdev)
|
|
{
|
|
struct net_device *dev;
|
|
struct macb *bp;
|
|
|
|
dev = platform_get_drvdata(pdev);
|
|
|
|
if (dev) {
|
|
bp = netdev_priv(dev);
|
|
macb_unregister_sysfs(dev);
|
|
unregister_netdev(dev);
|
|
free_irq(dev->irq, dev);
|
|
iounmap(bp->regs);
|
|
clk_disable(bp->hclk);
|
|
clk_disable(bp->pclk);
|
|
clk_put(bp->hclk);
|
|
clk_put(bp->pclk);
|
|
free_netdev(dev);
|
|
platform_set_drvdata(pdev, NULL);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver macb_driver = {
|
|
.probe = macb_probe,
|
|
.remove = __devexit_p(macb_remove),
|
|
.driver = {
|
|
.name = "macb",
|
|
},
|
|
};
|
|
|
|
static int __init macb_init(void)
|
|
{
|
|
return platform_driver_register(&macb_driver);
|
|
}
|
|
|
|
static void __exit macb_exit(void)
|
|
{
|
|
platform_driver_unregister(&macb_driver);
|
|
}
|
|
|
|
module_init(macb_init);
|
|
module_exit(macb_exit);
|
|
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_DESCRIPTION("Atmel MACB Ethernet driver");
|
|
MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
|