Daniel J Blueman ce2e572cfe x86/numachip: Introduce Numachip2 timer mechanisms ... Add 1GHz 64-bit Numachip2 clocksource timer support for accurate system-wide timekeeping, as core TSCs are unsynchronised. Additionally, add a per-core clockevent mechanism that interrupts via the platform IPI vector after a programmed period. [ tglx: Taking it through x86 due to dependencies ] Signed-off-by: Daniel J Blueman <daniel@numascale.com> Acked-by: Steffen Persvold <sp@numascale.com> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Link: http://lkml.kernel.org/r/1442829745-29311-1-git-send-email-daniel@numascale.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>		2015-09-22 22:25:33 +02:00
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numachip_csr.h	x86/numachip: Introduce Numachip2 timer mechanisms	2015-09-22 22:25:33 +02:00
numachip.h	x86/numachip: Add Numachip2 APIC support	2015-09-22 22:25:33 +02:00