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a54aef5072
The example uses gpio-cells = 1 while it should be two (it is even mentioned in the text above). Cc: devicetree@vger.kernel.org Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
61 lines
1.8 KiB
Plaintext
61 lines
1.8 KiB
Plaintext
* Synopsys DesignWare APB GPIO controller
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Required properties:
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- compatible : Should contain "snps,dw-apb-gpio"
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- reg : Address and length of the register set for the device.
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- #address-cells : should be 1 (for addressing port subnodes).
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- #size-cells : should be 0 (port subnodes).
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The GPIO controller has a configurable number of ports, each of which are
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represented as child nodes with the following properties:
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Required properties:
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- compatible : "snps,dw-apb-gpio-port"
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- gpio-controller : Marks the device node as a gpio controller.
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- #gpio-cells : Should be two. The first cell is the pin number and
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the second cell is used to specify the gpio polarity:
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0 = active high
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1 = active low
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- reg : The integer port index of the port, a single cell.
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Optional properties:
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- interrupt-controller : The first port may be configured to be an interrupt
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controller.
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- #interrupt-cells : Specifies the number of cells needed to encode an
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interrupt. Shall be set to 2. The first cell defines the interrupt number,
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the second encodes the triger flags encoded as described in
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Documentation/devicetree/bindings/interrupts.txt
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- interrupt-parent : The parent interrupt controller.
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- interrupts : The interrupt to the parent controller raised when GPIOs
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generate the interrupts.
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- snps,nr-gpios : The number of pins in the port, a single cell.
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Example:
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gpio: gpio@20000 {
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compatible = "snps,dw-apb-gpio";
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reg = <0x20000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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porta: gpio-controller@0 {
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compatible = "snps,dw-apb-gpio-port";
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gpio-controller;
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#gpio-cells = <2>;
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snps,nr-gpios = <8>;
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reg = <0>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&vic1>;
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interrupts = <0>;
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};
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portb: gpio-controller@1 {
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compatible = "snps,dw-apb-gpio-port";
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gpio-controller;
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#gpio-cells = <2>;
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snps,nr-gpios = <8>;
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reg = <1>;
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};
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};
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