linux_dsm_epyc7002/arch/arm/boot
Douglas Anderson 95671ec236 ARM: dts: rockchip: Specify rk3288-veyron-chromebook's display timings
Let's document the display timings that most veyron chromebooks (like
jaq, jerry, mighty, speedy) have been using out in the field.  This
uses the standard blankings but a slightly slower clock rate, thus
getting a refresh rate 58.3 Hz.

NOTE: this won't really do anything except cause DRM to properly
report the refresh rate since vop_crtc_mode_fixup() was rounding the
pixel clock to 74.25 MHz anyway.  Apparently the adjusted rate isn't
exposed to userspace so it's important that the rate we're trying to
achieve is mostly right.

For the downstream kernel change related to this see See
https://crrev.com/c/324558.

NOTE: minnie uses a different panel will be fixed up in a future
patch, so for now we'll just delete the panel timings there.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-07-22 01:03:55 +02:00
..
bootp treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
compressed treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
dts ARM: dts: rockchip: Specify rk3288-veyron-chromebook's display timings 2019-07-22 01:03:55 +02:00
.gitignore
deflate_xip_data.sh treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
install.sh
Makefile