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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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d2146cb274
This makes the sam440ep.dts dts-v1 compliant. Signed-off-by: Giuseppe Coviello <gicoviello@gmail.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
294 lines
7.2 KiB
Plaintext
294 lines
7.2 KiB
Plaintext
/*
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* Device Tree Source for ACube Sam440ep based off bamboo.dts code
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* original copyrights below
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*
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* Copyright (c) 2006, 2007 IBM Corp.
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* Josh Boyer <jwboyer@linux.vnet.ibm.com>
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*
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* Modified from bamboo.dts for sam440ep:
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* Copyright 2008 Giuseppe Coviello <gicoviello@gmail.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without
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* any warranty of any kind, whether express or implied.
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*/
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/dts-v1/;
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/ {
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#address-cells = <2>;
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#size-cells = <1>;
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model = "acube,sam440ep";
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compatible = "acube,sam440ep";
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aliases {
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ethernet0 = &EMAC0;
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ethernet1 = &EMAC1;
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serial0 = &UART0;
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serial1 = &UART1;
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serial2 = &UART2;
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serial3 = &UART3;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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model = "PowerPC,440EP";
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reg = <0>;
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clock-frequency = <0>; /* Filled in by zImage */
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timebase-frequency = <0>; /* Filled in by zImage */
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i-cache-line-size = <32>;
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d-cache-line-size = <32>;
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i-cache-size = <32768>;
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d-cache-size = <32768>;
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dcr-controller;
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dcr-access-method = "native";
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};
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};
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memory {
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device_type = "memory";
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reg = <0 0 0>; /* Filled in by zImage */
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};
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UIC0: interrupt-controller0 {
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compatible = "ibm,uic-440ep","ibm,uic";
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interrupt-controller;
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cell-index = <0>;
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dcr-reg = <0x0c0 9>;
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#address-cells = <0>;
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#size-cells = <0>;
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#interrupt-cells = <2>;
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};
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UIC1: interrupt-controller1 {
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compatible = "ibm,uic-440ep","ibm,uic";
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interrupt-controller;
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cell-index = <1>;
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dcr-reg = <0x0d0 9>;
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#address-cells = <0>;
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#size-cells = <0>;
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#interrupt-cells = <2>;
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interrupts = <0x1e 4 0x1f 4>; /* cascade */
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interrupt-parent = <&UIC0>;
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};
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SDR0: sdr {
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compatible = "ibm,sdr-440ep";
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dcr-reg = <0x00e 2>;
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};
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CPR0: cpr {
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compatible = "ibm,cpr-440ep";
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dcr-reg = <0x00c 2>;
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};
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plb {
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compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4";
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#address-cells = <2>;
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#size-cells = <1>;
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ranges;
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clock-frequency = <0>; /* Filled in by zImage */
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SDRAM0: sdram {
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compatible = "ibm,sdram-440ep", "ibm,sdram-405gp";
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dcr-reg = <0x010 2>;
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};
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DMA0: dma {
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compatible = "ibm,dma-440ep", "ibm,dma-440gp";
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dcr-reg = <0x100 0x027>;
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};
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MAL0: mcmal {
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compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal";
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dcr-reg = <0x180 0x062>;
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num-tx-chans = <4>;
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num-rx-chans = <2>;
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interrupt-parent = <&MAL0>;
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interrupts = <0 1 2 3 4>;
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#interrupt-cells = <1>;
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#address-cells = <0>;
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#size-cells = <0>;
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interrupt-map = </*TXEOB*/ 0 &UIC0 10 4
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/*RXEOB*/ 1 &UIC0 11 4
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/*SERR*/ 2 &UIC1 0 4
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/*TXDE*/ 3 &UIC1 1 4
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/*RXDE*/ 4 &UIC1 2 4>;
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};
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POB0: opb {
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compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb";
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#address-cells = <1>;
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#size-cells = <1>;
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/* Bamboo is oddball in the 44x world and doesn't use the ERPN
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* bits.
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*/
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ranges = <0x00000000 0 0x00000000 0x80000000
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0x80000000 0 0x80000000 0x80000000>;
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interrupt-parent = <&UIC1>;
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interrupts = <7 4>;
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clock-frequency = <0>; /* Filled in by zImage */
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EBC0: ebc {
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compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc";
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dcr-reg = <0x012 2>;
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#address-cells = <2>;
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#size-cells = <1>;
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clock-frequency = <0>; /* Filled in by zImage */
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interrupts = <5 1>;
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interrupt-parent = <&UIC1>;
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};
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UART0: serial@ef600300 {
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device_type = "serial";
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compatible = "ns16550";
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reg = <0xef600300 8>;
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virtual-reg = <0xef600300>;
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clock-frequency = <0>; /* Filled in by zImage */
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current-speed = <0x1c200>;
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interrupt-parent = <&UIC0>;
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interrupts = <0 4>;
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};
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UART1: serial@ef600400 {
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device_type = "serial";
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compatible = "ns16550";
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reg = <0xef600400 8>;
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virtual-reg = <0xef600400>;
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clock-frequency = <0>;
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current-speed = <0>;
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interrupt-parent = <&UIC0>;
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interrupts = <1 4>;
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};
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UART2: serial@ef600500 {
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device_type = "serial";
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compatible = "ns16550";
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reg = <0xef600500 8>;
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virtual-reg = <0xef600500>;
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clock-frequency = <0>;
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current-speed = <0>;
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interrupt-parent = <&UIC0>;
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interrupts = <3 4>;
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};
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UART3: serial@ef600600 {
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device_type = "serial";
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compatible = "ns16550";
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reg = <0xef600600 8>;
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virtual-reg = <0xef600600>;
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clock-frequency = <0>;
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current-speed = <0>;
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interrupt-parent = <&UIC0>;
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interrupts = <4 4>;
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};
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IIC0: i2c@ef600700 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
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index = <0>;
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reg = <0xef600700 0x14>;
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interrupt-parent = <&UIC0>;
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interrupts = <2 4>;
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rtc@68 {
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compatible = "stm,m41t80";
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reg = <0x68>;
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};
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};
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IIC1: i2c@ef600800 {
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compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
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index = <5>;
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reg = <0xef600800 0x14>;
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interrupt-parent = <&UIC0>;
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interrupts = <7 4>;
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};
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ZMII0: emac-zmii@ef600d00 {
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compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii";
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reg = <0xef600d00 0xc>;
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};
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EMAC0: ethernet@ef600e00 {
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linux,network-index = <0>;
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device_type = "network";
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compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
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interrupt-parent = <&UIC1>;
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interrupts = <0x1c 4 0x1d 4>;
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reg = <0xef600e00 0x70>;
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local-mac-address = [000000000000];
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mal-device = <&MAL0>;
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mal-tx-channel = <0 1>;
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mal-rx-channel = <0>;
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cell-index = <0>;
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max-frame-size = <0x5dc>;
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rx-fifo-size = <0x1000>;
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tx-fifo-size = <0x800>;
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phy-mode = "rmii";
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phy-map = <00000000>;
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zmii-device = <&ZMII0>;
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zmii-channel = <0>;
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};
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EMAC1: ethernet@ef600f00 {
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linux,network-index = <1>;
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device_type = "network";
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compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
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interrupt-parent = <&UIC1>;
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interrupts = <0x1e 4 0x1f 4>;
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reg = <0xef600f00 0x70>;
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local-mac-address = [000000000000];
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mal-device = <&MAL0>;
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mal-tx-channel = <2 3>;
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mal-rx-channel = <1>;
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cell-index = <1>;
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max-frame-size = <0x5dc>;
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rx-fifo-size = <0x1000>;
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tx-fifo-size = <0x800>;
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phy-mode = "rmii";
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phy-map = <00000000>;
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zmii-device = <&ZMII0>;
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zmii-channel = <1>;
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};
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usb@ef601000 {
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compatible = "ohci-be";
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reg = <0xef601000 0x80>;
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interrupts = <8 4 9 4>;
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interrupt-parent = <&UIC1>;
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};
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};
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PCI0: pci@ec000000 {
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device_type = "pci";
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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compatible = "ibm,plb440ep-pci", "ibm,plb-pci";
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primary;
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reg = <0 0xeec00000 8 /* Config space access */
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0 0xeed00000 4 /* IACK */
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0 0xeed00000 4 /* Special cycle */
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0 0xef400000 0x40>; /* Internal registers */
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/* Outbound ranges, one memory and one IO,
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* later cannot be changed. Chip supports a second
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* IO range but we don't use it for now
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*/
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ranges = <0x02000000 0 0xa0000000 0 0xa0000000 0 0x20000000
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0x01000000 0 0x00000000 0 0xe8000000 0 0x00010000>;
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/* Inbound 2GB range starting at 0 */
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dma-ranges = <0x42000000 0 0 0 0 0 0x80000000>;
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};
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};
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chosen {
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linux,stdout-path = "/plb/opb/serial@ef600300";
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};
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};
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