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c934b36127
SATA_PLL_SOFT_RESET bit of CTRL_CORE_SMA_SW_0 must be toggled between a SATA DPLL unlock and re-lock to prevent SATA lockup. Introduce a new DT parameter 'syscon-pllreset' to provide the syscon regmap access to this register which sits in the control module. If the register is not provided we fallback to the old behaviour i.e. SATA DPLL refclk will not be disabled and we prevent SoC low power states. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> |
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| .. | ||
| Kconfig | ||
| Makefile | ||
| phy-armada375-usb2.c | ||
| phy-bcm-kona-usb2.c | ||
| phy-berlin-sata.c | ||
| phy-berlin-usb.c | ||
| phy-brcmstb-sata.c | ||
| phy-core.c | ||
| phy-dm816x-usb.c | ||
| phy-exynos4x12-usb2.c | ||
| phy-exynos5-usbdrd.c | ||
| phy-exynos4210-usb2.c | ||
| phy-exynos5250-sata.c | ||
| phy-exynos5250-usb2.c | ||
| phy-exynos-dp-video.c | ||
| phy-exynos-mipi-video.c | ||
| phy-hix5hd2-sata.c | ||
| phy-miphy28lp.c | ||
| phy-miphy365x.c | ||
| phy-mvebu-sata.c | ||
| phy-omap-control.c | ||
| phy-omap-usb2.c | ||
| phy-pistachio-usb.c | ||
| phy-pxa-28nm-hsic.c | ||
| phy-pxa-28nm-usb2.c | ||
| phy-qcom-apq8064-sata.c | ||
| phy-qcom-ipq806x-sata.c | ||
| phy-qcom-ufs-i.h | ||
| phy-qcom-ufs-qmp-14nm.c | ||
| phy-qcom-ufs-qmp-14nm.h | ||
| phy-qcom-ufs-qmp-20nm.c | ||
| phy-qcom-ufs-qmp-20nm.h | ||
| phy-qcom-ufs.c | ||
| phy-rcar-gen2.c | ||
| phy-rockchip-usb.c | ||
| phy-s5pv210-usb2.c | ||
| phy-samsung-usb2.c | ||
| phy-samsung-usb2.h | ||
| phy-spear1310-miphy.c | ||
| phy-spear1340-miphy.c | ||
| phy-stih41x-usb.c | ||
| phy-stih407-usb.c | ||
| phy-sun4i-usb.c | ||
| phy-sun9i-usb.c | ||
| phy-ti-pipe3.c | ||
| phy-tusb1210.c | ||
| phy-twl4030-usb.c | ||
| phy-xgene.c | ||
| ulpi_phy.h | ||