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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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c775aa1230
Remove variable self-assignments. This silences a bunch of -Wself-assign warnings reported by clang. The changed code can be compiled without warnings by both gcc and clang. Signed-off-by: Toma Tabacu <toma.tabacu@imgtec.com> Signed-off-by: Daniel Sanders <daniel.sanders@imgtec.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9314/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
179 lines
4.4 KiB
C
179 lines
4.4 KiB
C
/* IEEE754 floating point arithmetic
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* double precision: common utilities
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*/
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/*
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* MIPS floating point support
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* Copyright (C) 1994-2000 Algorithmics Ltd.
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*
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* This program is free software; you can distribute it and/or modify it
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* under the terms of the GNU General Public License (Version 2) as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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#include "ieee754dp.h"
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union ieee754dp ieee754dp_add(union ieee754dp x, union ieee754dp y)
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{
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int s;
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COMPXDP;
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COMPYDP;
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EXPLODEXDP;
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EXPLODEYDP;
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ieee754_clearcx();
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FLUSHXDP;
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FLUSHYDP;
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switch (CLPAIR(xc, yc)) {
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case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_QNAN):
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case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_SNAN):
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case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_SNAN):
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case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_SNAN):
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case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_SNAN):
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case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_SNAN):
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case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_SNAN):
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case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_ZERO):
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case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_NORM):
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case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_DNORM):
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case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
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ieee754_setcx(IEEE754_INVALID_OPERATION);
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return ieee754dp_nanxcpt(ieee754dp_indef());
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case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
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case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
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case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_QNAN):
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case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN):
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return y;
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case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
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case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO):
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case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM):
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case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM):
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case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_INF):
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return x;
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/*
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* Infinity handling
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*/
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case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_INF):
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if (xs == ys)
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return x;
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ieee754_setcx(IEEE754_INVALID_OPERATION);
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return ieee754dp_indef();
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case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_INF):
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case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_INF):
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case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_INF):
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return y;
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case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_ZERO):
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case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_NORM):
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case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_DNORM):
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return x;
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/*
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* Zero handling
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*/
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case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_ZERO):
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if (xs == ys)
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return x;
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else
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return ieee754dp_zero(ieee754_csr.rm == FPU_CSR_RD);
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case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_ZERO):
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case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_ZERO):
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return x;
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case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_NORM):
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case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_DNORM):
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return y;
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case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM):
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DPDNORMX;
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/* FALL THROUGH */
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case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM):
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DPDNORMY;
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break;
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case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_NORM):
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DPDNORMX;
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break;
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case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_NORM):
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break;
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}
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assert(xm & DP_HIDDEN_BIT);
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assert(ym & DP_HIDDEN_BIT);
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/*
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* Provide guard,round and stick bit space.
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*/
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xm <<= 3;
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ym <<= 3;
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if (xe > ye) {
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/*
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* Have to shift y fraction right to align.
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*/
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s = xe - ye;
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ym = XDPSRS(ym, s);
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ye += s;
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} else if (ye > xe) {
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/*
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* Have to shift x fraction right to align.
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*/
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s = ye - xe;
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xm = XDPSRS(xm, s);
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xe += s;
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}
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assert(xe == ye);
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assert(xe <= DP_EMAX);
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if (xs == ys) {
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/*
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* Generate 28 bit result of adding two 27 bit numbers
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* leaving result in xm, xs and xe.
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*/
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xm = xm + ym;
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if (xm >> (DP_FBITS + 1 + 3)) { /* carry out */
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xm = XDPSRS1(xm);
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xe++;
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}
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} else {
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if (xm >= ym) {
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xm = xm - ym;
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} else {
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xm = ym - xm;
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xs = ys;
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}
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if (xm == 0)
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return ieee754dp_zero(ieee754_csr.rm == FPU_CSR_RD);
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/*
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* Normalize to rounding precision.
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*/
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while ((xm >> (DP_FBITS + 3)) == 0) {
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xm <<= 1;
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xe--;
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}
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}
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return ieee754dp_format(xs, xe, xm);
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}
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