Thierry Reding 94e25dc3a2 arm64: tegra: Add MISC registers on Tegra186 ... The MISC register block found on Tegra186 SoCs contains registers that can be used to identify a given chip and various strapping options. Signed-off-by: Thierry Reding <treding@nvidia.com>		2017-12-13 13:15:42 +01:00
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boot	arm64: tegra: Add MISC registers on Tegra186	2017-12-13 13:15:42 +01:00
configs	arm64: defconfig: enable CONFIG_GPIO_UNIPHIER	2017-10-30 14:41:54 +01:00
crypto	License cleanup: add SPDX GPL-2.0 license identifier to files with no license	2017-11-02 11:10:55 +01:00
include	File locking related changes for v4.15	2017-11-17 13:21:58 -08:00
kernel	arm64 updates for 4.15	2017-11-15 10:56:56 -08:00
kvm	GICv4 Support for KVM/ARM for v4.15	2017-11-17 13:20:01 +01:00
lib	arm64 updates for 4.15	2017-11-15 10:56:56 -08:00
mm	arm64/mm/kasan: don't use vmemmap_populate() to initialize shadow	2017-11-15 18:21:05 -08:00
net	bpf, arm64: implement jiting of BPF_J{LT, LE, SLT, SLE}	2017-08-09 16:53:56 -07:00
xen
Kconfig	arm64/mm/kasan: don't use vmemmap_populate() to initialize shadow	2017-11-15 18:21:05 -08:00
Kconfig.debug	arm64: relocation testing module	2017-04-04 17:03:32 +01:00
Kconfig.platforms	ARM: SoC driver updates for v4.15	2017-11-16 16:05:01 -08:00
Makefile	arm64: support __int128 on gcc 5+	2017-11-03 15:24:21 +00:00