mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-26 22:24:56 +07:00
59809fe882
The perf infrastructure is used for userspace to track issues. At least a good part of what's described here is related to it. So, add it to the admin-guide. Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
30 lines
1.2 KiB
ReStructuredText
30 lines
1.2 KiB
ReStructuredText
==================================
|
|
ARM DynamIQ Shared Unit (DSU) PMU
|
|
==================================
|
|
|
|
ARM DynamIQ Shared Unit integrates one or more cores with an L3 memory system,
|
|
control logic and external interfaces to form a multicore cluster. The PMU
|
|
allows counting the various events related to the L3 cache, Snoop Control Unit
|
|
etc, using 32bit independent counters. It also provides a 64bit cycle counter.
|
|
|
|
The PMU can only be accessed via CPU system registers and are common to the
|
|
cores connected to the same DSU. Like most of the other uncore PMUs, DSU
|
|
PMU doesn't support process specific events and cannot be used in sampling mode.
|
|
|
|
The DSU provides a bitmap for a subset of implemented events via hardware
|
|
registers. There is no way for the driver to determine if the other events
|
|
are available or not. Hence the driver exposes only those events advertised
|
|
by the DSU, in "events" directory under::
|
|
|
|
/sys/bus/event_sources/devices/arm_dsu_<N>/
|
|
|
|
The user should refer to the TRM of the product to figure out the supported events
|
|
and use the raw event code for the unlisted events.
|
|
|
|
The driver also exposes the CPUs connected to the DSU instance in "associated_cpus".
|
|
|
|
|
|
e.g usage::
|
|
|
|
perf stat -a -e arm_dsu_0/cycles/
|