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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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04fcab32d3
Broadcom Brahma-B15 (r0p0..r0p2) is also affected by Cortex-A15 erratum 798181, so enable the workaround for Brahma-B15. Signed-off-by: Gregory Fong <gregory.0xf0@gmail.com> Acked-by: Marc Carino <marc.ceeeee@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
214 lines
4.7 KiB
C
214 lines
4.7 KiB
C
/*
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* linux/arch/arm/kernel/smp_tlb.c
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*
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* Copyright (C) 2002 ARM Limited, All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/preempt.h>
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#include <linux/smp.h>
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#include <asm/smp_plat.h>
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#include <asm/tlbflush.h>
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#include <asm/mmu_context.h>
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/**********************************************************************/
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/*
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* TLB operations
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*/
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struct tlb_args {
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struct vm_area_struct *ta_vma;
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unsigned long ta_start;
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unsigned long ta_end;
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};
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static inline void ipi_flush_tlb_all(void *ignored)
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{
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local_flush_tlb_all();
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}
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static inline void ipi_flush_tlb_mm(void *arg)
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{
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struct mm_struct *mm = (struct mm_struct *)arg;
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local_flush_tlb_mm(mm);
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}
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static inline void ipi_flush_tlb_page(void *arg)
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{
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struct tlb_args *ta = (struct tlb_args *)arg;
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local_flush_tlb_page(ta->ta_vma, ta->ta_start);
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}
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static inline void ipi_flush_tlb_kernel_page(void *arg)
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{
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struct tlb_args *ta = (struct tlb_args *)arg;
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local_flush_tlb_kernel_page(ta->ta_start);
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}
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static inline void ipi_flush_tlb_range(void *arg)
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{
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struct tlb_args *ta = (struct tlb_args *)arg;
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local_flush_tlb_range(ta->ta_vma, ta->ta_start, ta->ta_end);
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}
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static inline void ipi_flush_tlb_kernel_range(void *arg)
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{
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struct tlb_args *ta = (struct tlb_args *)arg;
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local_flush_tlb_kernel_range(ta->ta_start, ta->ta_end);
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}
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static inline void ipi_flush_bp_all(void *ignored)
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{
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local_flush_bp_all();
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}
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#ifdef CONFIG_ARM_ERRATA_798181
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bool (*erratum_a15_798181_handler)(void);
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static bool erratum_a15_798181_partial(void)
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{
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asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (0));
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dsb(ish);
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return false;
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}
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static bool erratum_a15_798181_broadcast(void)
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{
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asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (0));
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dsb(ish);
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return true;
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}
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void erratum_a15_798181_init(void)
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{
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unsigned int midr = read_cpuid_id();
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unsigned int revidr = read_cpuid(CPUID_REVIDR);
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/* Brahma-B15 r0p0..r0p2 affected
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* Cortex-A15 r0p0..r3p2 w/o ECO fix affected */
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if ((midr & 0xff0ffff0) == 0x420f00f0 && midr <= 0x420f00f2)
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erratum_a15_798181_handler = erratum_a15_798181_broadcast;
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else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr <= 0x413fc0f2 &&
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(revidr & 0x210) != 0x210) {
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if (revidr & 0x10)
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erratum_a15_798181_handler =
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erratum_a15_798181_partial;
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else
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erratum_a15_798181_handler =
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erratum_a15_798181_broadcast;
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}
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}
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#endif
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static void ipi_flush_tlb_a15_erratum(void *arg)
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{
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dmb();
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}
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static void broadcast_tlb_a15_erratum(void)
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{
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if (!erratum_a15_798181())
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return;
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smp_call_function(ipi_flush_tlb_a15_erratum, NULL, 1);
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}
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static void broadcast_tlb_mm_a15_erratum(struct mm_struct *mm)
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{
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int this_cpu;
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cpumask_t mask = { CPU_BITS_NONE };
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if (!erratum_a15_798181())
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return;
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this_cpu = get_cpu();
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a15_erratum_get_cpumask(this_cpu, mm, &mask);
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smp_call_function_many(&mask, ipi_flush_tlb_a15_erratum, NULL, 1);
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put_cpu();
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}
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void flush_tlb_all(void)
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{
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if (tlb_ops_need_broadcast())
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on_each_cpu(ipi_flush_tlb_all, NULL, 1);
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else
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__flush_tlb_all();
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broadcast_tlb_a15_erratum();
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}
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void flush_tlb_mm(struct mm_struct *mm)
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{
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if (tlb_ops_need_broadcast())
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on_each_cpu_mask(mm_cpumask(mm), ipi_flush_tlb_mm, mm, 1);
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else
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__flush_tlb_mm(mm);
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broadcast_tlb_mm_a15_erratum(mm);
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}
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void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
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{
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if (tlb_ops_need_broadcast()) {
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struct tlb_args ta;
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ta.ta_vma = vma;
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ta.ta_start = uaddr;
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on_each_cpu_mask(mm_cpumask(vma->vm_mm), ipi_flush_tlb_page,
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&ta, 1);
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} else
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__flush_tlb_page(vma, uaddr);
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broadcast_tlb_mm_a15_erratum(vma->vm_mm);
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}
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void flush_tlb_kernel_page(unsigned long kaddr)
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{
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if (tlb_ops_need_broadcast()) {
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struct tlb_args ta;
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ta.ta_start = kaddr;
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on_each_cpu(ipi_flush_tlb_kernel_page, &ta, 1);
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} else
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__flush_tlb_kernel_page(kaddr);
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broadcast_tlb_a15_erratum();
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}
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void flush_tlb_range(struct vm_area_struct *vma,
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unsigned long start, unsigned long end)
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{
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if (tlb_ops_need_broadcast()) {
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struct tlb_args ta;
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ta.ta_vma = vma;
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ta.ta_start = start;
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ta.ta_end = end;
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on_each_cpu_mask(mm_cpumask(vma->vm_mm), ipi_flush_tlb_range,
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&ta, 1);
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} else
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local_flush_tlb_range(vma, start, end);
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broadcast_tlb_mm_a15_erratum(vma->vm_mm);
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}
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void flush_tlb_kernel_range(unsigned long start, unsigned long end)
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{
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if (tlb_ops_need_broadcast()) {
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struct tlb_args ta;
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ta.ta_start = start;
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ta.ta_end = end;
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on_each_cpu(ipi_flush_tlb_kernel_range, &ta, 1);
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} else
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local_flush_tlb_kernel_range(start, end);
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broadcast_tlb_a15_erratum();
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}
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void flush_bp_all(void)
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{
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if (tlb_ops_need_broadcast())
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on_each_cpu(ipi_flush_bp_all, NULL, 1);
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else
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__flush_bp_all();
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}
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