mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-12 11:46:43 +07:00
494 lines
11 KiB
C
494 lines
11 KiB
C
/*
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* This file is part of wl1271
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*
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* Copyright (C) 2008-2009 Nokia Corporation
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*
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* Contact: Luciano Coelho <luciano.coelho@nokia.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
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* 02110-1301 USA
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*
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*/
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/module.h>
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#include <linux/crc7.h>
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#include <linux/spi/spi.h>
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#include <linux/wl12xx.h>
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#include <linux/slab.h>
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#include "wl12xx.h"
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#include "wl12xx_80211.h"
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#include "io.h"
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#include "reg.h"
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#define WSPI_CMD_READ 0x40000000
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#define WSPI_CMD_WRITE 0x00000000
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#define WSPI_CMD_FIXED 0x20000000
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#define WSPI_CMD_BYTE_LENGTH 0x1FFE0000
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#define WSPI_CMD_BYTE_LENGTH_OFFSET 17
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#define WSPI_CMD_BYTE_ADDR 0x0001FFFF
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#define WSPI_INIT_CMD_CRC_LEN 5
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#define WSPI_INIT_CMD_START 0x00
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#define WSPI_INIT_CMD_TX 0x40
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/* the extra bypass bit is sampled by the TNET as '1' */
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#define WSPI_INIT_CMD_BYPASS_BIT 0x80
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#define WSPI_INIT_CMD_FIXEDBUSY_LEN 0x07
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#define WSPI_INIT_CMD_EN_FIXEDBUSY 0x80
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#define WSPI_INIT_CMD_DIS_FIXEDBUSY 0x00
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#define WSPI_INIT_CMD_IOD 0x40
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#define WSPI_INIT_CMD_IP 0x20
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#define WSPI_INIT_CMD_CS 0x10
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#define WSPI_INIT_CMD_WS 0x08
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#define WSPI_INIT_CMD_WSPI 0x01
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#define WSPI_INIT_CMD_END 0x01
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#define WSPI_INIT_CMD_LEN 8
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#define HW_ACCESS_WSPI_FIXED_BUSY_LEN \
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((WL1271_BUSY_WORD_LEN - 4) / sizeof(u32))
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#define HW_ACCESS_WSPI_INIT_CMD_MASK 0
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/* HW limitation: maximum possible chunk size is 4095 bytes */
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#define WSPI_MAX_CHUNK_SIZE 4092
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#define WSPI_MAX_NUM_OF_CHUNKS (WL1271_AGGR_BUFFER_SIZE / WSPI_MAX_CHUNK_SIZE)
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static inline struct spi_device *wl_to_spi(struct wl1271 *wl)
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{
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return wl->if_priv;
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}
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static struct device *wl1271_spi_wl_to_dev(struct wl1271 *wl)
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{
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return &(wl_to_spi(wl)->dev);
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}
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static void wl1271_spi_disable_interrupts(struct wl1271 *wl)
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{
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disable_irq(wl->irq);
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}
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static void wl1271_spi_enable_interrupts(struct wl1271 *wl)
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{
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enable_irq(wl->irq);
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}
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static void wl1271_spi_reset(struct wl1271 *wl)
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{
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u8 *cmd;
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struct spi_transfer t;
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struct spi_message m;
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cmd = kzalloc(WSPI_INIT_CMD_LEN, GFP_KERNEL);
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if (!cmd) {
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wl1271_error("could not allocate cmd for spi reset");
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return;
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}
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memset(&t, 0, sizeof(t));
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spi_message_init(&m);
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memset(cmd, 0xff, WSPI_INIT_CMD_LEN);
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t.tx_buf = cmd;
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t.len = WSPI_INIT_CMD_LEN;
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spi_message_add_tail(&t, &m);
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spi_sync(wl_to_spi(wl), &m);
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wl1271_dump(DEBUG_SPI, "spi reset -> ", cmd, WSPI_INIT_CMD_LEN);
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kfree(cmd);
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}
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static void wl1271_spi_init(struct wl1271 *wl)
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{
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u8 crc[WSPI_INIT_CMD_CRC_LEN], *cmd;
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struct spi_transfer t;
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struct spi_message m;
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cmd = kzalloc(WSPI_INIT_CMD_LEN, GFP_KERNEL);
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if (!cmd) {
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wl1271_error("could not allocate cmd for spi init");
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return;
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}
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memset(crc, 0, sizeof(crc));
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memset(&t, 0, sizeof(t));
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spi_message_init(&m);
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/*
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* Set WSPI_INIT_COMMAND
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* the data is being send from the MSB to LSB
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*/
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cmd[2] = 0xff;
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cmd[3] = 0xff;
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cmd[1] = WSPI_INIT_CMD_START | WSPI_INIT_CMD_TX;
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cmd[0] = 0;
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cmd[7] = 0;
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cmd[6] |= HW_ACCESS_WSPI_INIT_CMD_MASK << 3;
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cmd[6] |= HW_ACCESS_WSPI_FIXED_BUSY_LEN & WSPI_INIT_CMD_FIXEDBUSY_LEN;
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if (HW_ACCESS_WSPI_FIXED_BUSY_LEN == 0)
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cmd[5] |= WSPI_INIT_CMD_DIS_FIXEDBUSY;
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else
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cmd[5] |= WSPI_INIT_CMD_EN_FIXEDBUSY;
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cmd[5] |= WSPI_INIT_CMD_IOD | WSPI_INIT_CMD_IP | WSPI_INIT_CMD_CS
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| WSPI_INIT_CMD_WSPI | WSPI_INIT_CMD_WS;
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crc[0] = cmd[1];
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crc[1] = cmd[0];
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crc[2] = cmd[7];
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crc[3] = cmd[6];
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crc[4] = cmd[5];
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cmd[4] |= crc7(0, crc, WSPI_INIT_CMD_CRC_LEN) << 1;
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cmd[4] |= WSPI_INIT_CMD_END;
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t.tx_buf = cmd;
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t.len = WSPI_INIT_CMD_LEN;
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spi_message_add_tail(&t, &m);
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spi_sync(wl_to_spi(wl), &m);
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wl1271_dump(DEBUG_SPI, "spi init -> ", cmd, WSPI_INIT_CMD_LEN);
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kfree(cmd);
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}
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#define WL1271_BUSY_WORD_TIMEOUT 1000
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static int wl1271_spi_read_busy(struct wl1271 *wl)
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{
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struct spi_transfer t[1];
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struct spi_message m;
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u32 *busy_buf;
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int num_busy_bytes = 0;
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/*
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* Read further busy words from SPI until a non-busy word is
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* encountered, then read the data itself into the buffer.
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*/
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num_busy_bytes = WL1271_BUSY_WORD_TIMEOUT;
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busy_buf = wl->buffer_busyword;
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while (num_busy_bytes) {
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num_busy_bytes--;
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spi_message_init(&m);
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memset(t, 0, sizeof(t));
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t[0].rx_buf = busy_buf;
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t[0].len = sizeof(u32);
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t[0].cs_change = true;
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spi_message_add_tail(&t[0], &m);
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spi_sync(wl_to_spi(wl), &m);
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if (*busy_buf & 0x1)
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return 0;
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}
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/* The SPI bus is unresponsive, the read failed. */
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wl1271_error("SPI read busy-word timeout!\n");
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return -ETIMEDOUT;
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}
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static void wl1271_spi_raw_read(struct wl1271 *wl, int addr, void *buf,
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size_t len, bool fixed)
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{
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struct spi_transfer t[2];
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struct spi_message m;
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u32 *busy_buf;
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u32 *cmd;
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u32 chunk_len;
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while (len > 0) {
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chunk_len = min((size_t)WSPI_MAX_CHUNK_SIZE, len);
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cmd = &wl->buffer_cmd;
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busy_buf = wl->buffer_busyword;
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*cmd = 0;
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*cmd |= WSPI_CMD_READ;
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*cmd |= (chunk_len << WSPI_CMD_BYTE_LENGTH_OFFSET) &
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WSPI_CMD_BYTE_LENGTH;
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*cmd |= addr & WSPI_CMD_BYTE_ADDR;
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if (fixed)
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*cmd |= WSPI_CMD_FIXED;
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spi_message_init(&m);
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memset(t, 0, sizeof(t));
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t[0].tx_buf = cmd;
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t[0].len = 4;
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t[0].cs_change = true;
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spi_message_add_tail(&t[0], &m);
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/* Busy and non busy words read */
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t[1].rx_buf = busy_buf;
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t[1].len = WL1271_BUSY_WORD_LEN;
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t[1].cs_change = true;
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spi_message_add_tail(&t[1], &m);
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spi_sync(wl_to_spi(wl), &m);
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if (!(busy_buf[WL1271_BUSY_WORD_CNT - 1] & 0x1) &&
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wl1271_spi_read_busy(wl)) {
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memset(buf, 0, chunk_len);
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return;
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}
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spi_message_init(&m);
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memset(t, 0, sizeof(t));
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t[0].rx_buf = buf;
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t[0].len = chunk_len;
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t[0].cs_change = true;
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spi_message_add_tail(&t[0], &m);
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spi_sync(wl_to_spi(wl), &m);
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wl1271_dump(DEBUG_SPI, "spi_read cmd -> ", cmd, sizeof(*cmd));
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wl1271_dump(DEBUG_SPI, "spi_read buf <- ", buf, chunk_len);
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if (!fixed)
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addr += chunk_len;
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buf += chunk_len;
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len -= chunk_len;
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}
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}
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static void wl1271_spi_raw_write(struct wl1271 *wl, int addr, void *buf,
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size_t len, bool fixed)
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{
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struct spi_transfer t[2 * WSPI_MAX_NUM_OF_CHUNKS];
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struct spi_message m;
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u32 commands[WSPI_MAX_NUM_OF_CHUNKS];
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u32 *cmd;
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u32 chunk_len;
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int i;
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WARN_ON(len > WL1271_AGGR_BUFFER_SIZE);
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spi_message_init(&m);
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memset(t, 0, sizeof(t));
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cmd = &commands[0];
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i = 0;
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while (len > 0) {
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chunk_len = min((size_t)WSPI_MAX_CHUNK_SIZE, len);
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*cmd = 0;
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*cmd |= WSPI_CMD_WRITE;
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*cmd |= (chunk_len << WSPI_CMD_BYTE_LENGTH_OFFSET) &
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WSPI_CMD_BYTE_LENGTH;
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*cmd |= addr & WSPI_CMD_BYTE_ADDR;
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if (fixed)
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*cmd |= WSPI_CMD_FIXED;
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t[i].tx_buf = cmd;
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t[i].len = sizeof(*cmd);
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spi_message_add_tail(&t[i++], &m);
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t[i].tx_buf = buf;
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t[i].len = chunk_len;
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spi_message_add_tail(&t[i++], &m);
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wl1271_dump(DEBUG_SPI, "spi_write cmd -> ", cmd, sizeof(*cmd));
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wl1271_dump(DEBUG_SPI, "spi_write buf -> ", buf, chunk_len);
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if (!fixed)
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addr += chunk_len;
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buf += chunk_len;
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len -= chunk_len;
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cmd++;
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}
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spi_sync(wl_to_spi(wl), &m);
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}
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static irqreturn_t wl1271_hardirq(int irq, void *cookie)
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{
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struct wl1271 *wl = cookie;
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unsigned long flags;
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wl1271_debug(DEBUG_IRQ, "IRQ");
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/* complete the ELP completion */
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spin_lock_irqsave(&wl->wl_lock, flags);
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set_bit(WL1271_FLAG_IRQ_RUNNING, &wl->flags);
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if (wl->elp_compl) {
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complete(wl->elp_compl);
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wl->elp_compl = NULL;
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}
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spin_unlock_irqrestore(&wl->wl_lock, flags);
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return IRQ_WAKE_THREAD;
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}
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static int wl1271_spi_set_power(struct wl1271 *wl, bool enable)
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{
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if (wl->set_power)
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wl->set_power(enable);
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return 0;
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}
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static struct wl1271_if_operations spi_ops = {
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.read = wl1271_spi_raw_read,
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.write = wl1271_spi_raw_write,
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.reset = wl1271_spi_reset,
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.init = wl1271_spi_init,
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.power = wl1271_spi_set_power,
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.dev = wl1271_spi_wl_to_dev,
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.enable_irq = wl1271_spi_enable_interrupts,
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.disable_irq = wl1271_spi_disable_interrupts,
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.set_block_size = NULL,
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};
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static int __devinit wl1271_probe(struct spi_device *spi)
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{
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struct wl12xx_platform_data *pdata;
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struct ieee80211_hw *hw;
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struct wl1271 *wl;
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unsigned long irqflags;
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int ret;
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pdata = spi->dev.platform_data;
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if (!pdata) {
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wl1271_error("no platform data");
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return -ENODEV;
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}
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hw = wl1271_alloc_hw();
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if (IS_ERR(hw))
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return PTR_ERR(hw);
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wl = hw->priv;
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dev_set_drvdata(&spi->dev, wl);
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wl->if_priv = spi;
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wl->if_ops = &spi_ops;
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/* This is the only SPI value that we need to set here, the rest
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* comes from the board-peripherals file */
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spi->bits_per_word = 32;
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ret = spi_setup(spi);
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if (ret < 0) {
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wl1271_error("spi_setup failed");
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goto out_free;
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}
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wl->set_power = pdata->set_power;
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if (!wl->set_power) {
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wl1271_error("set power function missing in platform data");
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ret = -ENODEV;
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goto out_free;
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}
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wl->ref_clock = pdata->board_ref_clock;
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wl->tcxo_clock = pdata->board_tcxo_clock;
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wl->platform_quirks = pdata->platform_quirks;
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if (wl->platform_quirks & WL12XX_PLATFORM_QUIRK_EDGE_IRQ)
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irqflags = IRQF_TRIGGER_RISING;
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else
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irqflags = IRQF_TRIGGER_HIGH | IRQF_ONESHOT;
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wl->irq = spi->irq;
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if (wl->irq < 0) {
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wl1271_error("irq missing in platform data");
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ret = -ENODEV;
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goto out_free;
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}
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ret = request_threaded_irq(wl->irq, wl1271_hardirq, wl1271_irq,
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irqflags,
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DRIVER_NAME, wl);
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if (ret < 0) {
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wl1271_error("request_irq() failed: %d", ret);
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goto out_free;
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}
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disable_irq(wl->irq);
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ret = wl1271_init_ieee80211(wl);
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if (ret)
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goto out_irq;
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ret = wl1271_register_hw(wl);
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if (ret)
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goto out_irq;
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return 0;
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out_irq:
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free_irq(wl->irq, wl);
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out_free:
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wl1271_free_hw(wl);
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return ret;
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}
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static int __devexit wl1271_remove(struct spi_device *spi)
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{
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struct wl1271 *wl = dev_get_drvdata(&spi->dev);
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wl1271_unregister_hw(wl);
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free_irq(wl->irq, wl);
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wl1271_free_hw(wl);
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return 0;
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}
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static struct spi_driver wl1271_spi_driver = {
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.driver = {
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.name = "wl1271_spi",
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.bus = &spi_bus_type,
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.owner = THIS_MODULE,
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},
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.probe = wl1271_probe,
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.remove = __devexit_p(wl1271_remove),
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};
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static int __init wl1271_init(void)
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{
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return spi_register_driver(&wl1271_spi_driver);
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}
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static void __exit wl1271_exit(void)
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{
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spi_unregister_driver(&wl1271_spi_driver);
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}
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module_init(wl1271_init);
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module_exit(wl1271_exit);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Luciano Coelho <coelho@ti.com>");
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MODULE_AUTHOR("Juuso Oikarinen <juuso.oikarinen@nokia.com>");
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MODULE_FIRMWARE(WL1271_FW_NAME);
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MODULE_FIRMWARE(WL128X_FW_NAME);
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MODULE_FIRMWARE(WL127X_AP_FW_NAME);
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MODULE_FIRMWARE(WL128X_AP_FW_NAME);
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MODULE_ALIAS("spi:wl1271");
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