mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-23 13:00:33 +07:00
e6ba764802
Allocate only an internal intel_context for the kernel_context, forgoing a global GEM context for internal use as we only require a separate address space (for our own protection). Now having weaned GT from requiring ce->gem_context, we can stop referencing it entirely. This also means we no longer have to create random and unnecessary GEM contexts for internal use. GEM contexts are now entirely for tracking GEM clients, and intel_context the execution environment on the GPU. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Andi Shyti <andi.shyti@intel.com> Acked-by: Andi Shyti <andi.shyti@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20191221160324.1073045-1-chris@chris-wilson.co.uk
444 lines
9.6 KiB
C
444 lines
9.6 KiB
C
/*
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* SPDX-License-Identifier: GPL-2.0
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*
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* Copyright © 2019 Intel Corporation
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*/
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#include "i915_selftest.h"
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#include "intel_engine_heartbeat.h"
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#include "intel_engine_pm.h"
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#include "intel_gt.h"
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#include "gem/selftests/mock_context.h"
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#include "selftests/igt_flush_test.h"
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#include "selftests/mock_drm.h"
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static int request_sync(struct i915_request *rq)
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{
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struct intel_timeline *tl = i915_request_timeline(rq);
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long timeout;
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int err = 0;
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intel_timeline_get(tl);
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i915_request_get(rq);
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/* Opencode i915_request_add() so we can keep the timeline locked. */
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__i915_request_commit(rq);
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__i915_request_queue(rq, NULL);
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timeout = i915_request_wait(rq, 0, HZ / 10);
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if (timeout < 0)
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err = timeout;
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else
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i915_request_retire_upto(rq);
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lockdep_unpin_lock(&tl->mutex, rq->cookie);
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mutex_unlock(&tl->mutex);
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i915_request_put(rq);
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intel_timeline_put(tl);
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return err;
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}
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static int context_sync(struct intel_context *ce)
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{
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struct intel_timeline *tl = ce->timeline;
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int err = 0;
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mutex_lock(&tl->mutex);
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do {
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struct i915_request *rq;
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long timeout;
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if (list_empty(&tl->requests))
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break;
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rq = list_last_entry(&tl->requests, typeof(*rq), link);
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i915_request_get(rq);
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timeout = i915_request_wait(rq, 0, HZ / 10);
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if (timeout < 0)
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err = timeout;
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else
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i915_request_retire_upto(rq);
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i915_request_put(rq);
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} while (!err);
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mutex_unlock(&tl->mutex);
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return err;
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}
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static int __live_context_size(struct intel_engine_cs *engine)
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{
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struct intel_context *ce;
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struct i915_request *rq;
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void *vaddr;
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int err;
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ce = intel_context_create(engine);
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if (IS_ERR(ce))
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return PTR_ERR(ce);
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err = intel_context_pin(ce);
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if (err)
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goto err;
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vaddr = i915_gem_object_pin_map(ce->state->obj,
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i915_coherent_map_type(engine->i915));
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if (IS_ERR(vaddr)) {
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err = PTR_ERR(vaddr);
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intel_context_unpin(ce);
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goto err;
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}
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/*
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* Note that execlists also applies a redzone which it checks on
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* context unpin when debugging. We are using the same location
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* and same poison value so that our checks overlap. Despite the
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* redundancy, we want to keep this little selftest so that we
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* get coverage of any and all submission backends, and we can
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* always extend this test to ensure we trick the HW into a
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* compromising position wrt to the various sections that need
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* to be written into the context state.
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*
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* TLDR; this overlaps with the execlists redzone.
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*/
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vaddr += engine->context_size - I915_GTT_PAGE_SIZE;
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memset(vaddr, POISON_INUSE, I915_GTT_PAGE_SIZE);
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rq = intel_context_create_request(ce);
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intel_context_unpin(ce);
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if (IS_ERR(rq)) {
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err = PTR_ERR(rq);
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goto err_unpin;
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}
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err = request_sync(rq);
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if (err)
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goto err_unpin;
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/* Force the context switch */
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rq = intel_engine_create_kernel_request(engine);
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if (IS_ERR(rq)) {
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err = PTR_ERR(rq);
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goto err_unpin;
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}
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err = request_sync(rq);
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if (err)
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goto err_unpin;
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if (memchr_inv(vaddr, POISON_INUSE, I915_GTT_PAGE_SIZE)) {
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pr_err("%s context overwrote trailing red-zone!", engine->name);
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err = -EINVAL;
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}
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err_unpin:
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i915_gem_object_unpin_map(ce->state->obj);
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err:
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intel_context_put(ce);
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return err;
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}
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static int live_context_size(void *arg)
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{
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struct intel_gt *gt = arg;
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struct intel_engine_cs *engine;
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enum intel_engine_id id;
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int err = 0;
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/*
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* Check that our context sizes are correct by seeing if the
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* HW tries to write past the end of one.
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*/
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for_each_engine(engine, gt, id) {
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struct {
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struct drm_i915_gem_object *state;
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void *pinned;
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} saved;
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if (!engine->context_size)
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continue;
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intel_engine_pm_get(engine);
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/*
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* Hide the old default state -- we lie about the context size
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* and get confused when the default state is smaller than
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* expected. For our do nothing request, inheriting the
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* active state is sufficient, we are only checking that we
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* don't use more than we planned.
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*/
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saved.state = fetch_and_zero(&engine->default_state);
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saved.pinned = fetch_and_zero(&engine->pinned_default_state);
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/* Overlaps with the execlists redzone */
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engine->context_size += I915_GTT_PAGE_SIZE;
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err = __live_context_size(engine);
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engine->context_size -= I915_GTT_PAGE_SIZE;
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engine->pinned_default_state = saved.pinned;
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engine->default_state = saved.state;
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intel_engine_pm_put(engine);
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if (err)
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break;
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}
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return err;
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}
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static int __live_active_context(struct intel_engine_cs *engine)
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{
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unsigned long saved_heartbeat;
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struct intel_context *ce;
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int pass;
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int err;
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/*
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* We keep active contexts alive until after a subsequent context
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* switch as the final write from the context-save will be after
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* we retire the final request. We track when we unpin the context,
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* under the presumption that the final pin is from the last request,
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* and instead of immediately unpinning the context, we add a task
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* to unpin the context from the next idle-barrier.
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*
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* This test makes sure that the context is kept alive until a
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* subsequent idle-barrier (emitted when the engine wakeref hits 0
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* with no more outstanding requests).
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*/
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if (intel_engine_pm_is_awake(engine)) {
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pr_err("%s is awake before starting %s!\n",
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engine->name, __func__);
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return -EINVAL;
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}
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ce = intel_context_create(engine);
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if (IS_ERR(ce))
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return PTR_ERR(ce);
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saved_heartbeat = engine->props.heartbeat_interval_ms;
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engine->props.heartbeat_interval_ms = 0;
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for (pass = 0; pass <= 2; pass++) {
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struct i915_request *rq;
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intel_engine_pm_get(engine);
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rq = intel_context_create_request(ce);
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if (IS_ERR(rq)) {
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err = PTR_ERR(rq);
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goto out_engine;
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}
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err = request_sync(rq);
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if (err)
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goto out_engine;
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/* Context will be kept active until after an idle-barrier. */
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if (i915_active_is_idle(&ce->active)) {
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pr_err("context is not active; expected idle-barrier (%s pass %d)\n",
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engine->name, pass);
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err = -EINVAL;
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goto out_engine;
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}
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if (!intel_engine_pm_is_awake(engine)) {
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pr_err("%s is asleep before idle-barrier\n",
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engine->name);
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err = -EINVAL;
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goto out_engine;
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}
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out_engine:
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intel_engine_pm_put(engine);
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if (err)
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goto err;
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}
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/* Now make sure our idle-barriers are flushed */
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err = intel_engine_flush_barriers(engine);
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if (err)
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goto err;
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/* Wait for the barrier and in the process wait for engine to park */
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err = context_sync(engine->kernel_context);
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if (err)
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goto err;
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if (!i915_active_is_idle(&ce->active)) {
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pr_err("context is still active!");
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err = -EINVAL;
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}
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intel_engine_pm_flush(engine);
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if (intel_engine_pm_is_awake(engine)) {
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struct drm_printer p = drm_debug_printer(__func__);
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intel_engine_dump(engine, &p,
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"%s is still awake:%d after idle-barriers\n",
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engine->name,
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atomic_read(&engine->wakeref.count));
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GEM_TRACE_DUMP();
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err = -EINVAL;
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goto err;
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}
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err:
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engine->props.heartbeat_interval_ms = saved_heartbeat;
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intel_context_put(ce);
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return err;
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}
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static int live_active_context(void *arg)
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{
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struct intel_gt *gt = arg;
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struct intel_engine_cs *engine;
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enum intel_engine_id id;
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int err = 0;
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for_each_engine(engine, gt, id) {
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err = __live_active_context(engine);
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if (err)
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break;
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err = igt_flush_test(gt->i915);
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if (err)
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break;
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}
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return err;
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}
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static int __remote_sync(struct intel_context *ce, struct intel_context *remote)
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{
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struct i915_request *rq;
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int err;
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err = intel_context_pin(remote);
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if (err)
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return err;
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rq = intel_context_create_request(ce);
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if (IS_ERR(rq)) {
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err = PTR_ERR(rq);
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goto unpin;
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}
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err = intel_context_prepare_remote_request(remote, rq);
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if (err) {
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i915_request_add(rq);
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goto unpin;
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}
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err = request_sync(rq);
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unpin:
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intel_context_unpin(remote);
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return err;
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}
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static int __live_remote_context(struct intel_engine_cs *engine)
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{
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struct intel_context *local, *remote;
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unsigned long saved_heartbeat;
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int pass;
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int err;
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/*
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* Check that our idle barriers do not interfere with normal
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* activity tracking. In particular, check that operating
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* on the context image remotely (intel_context_prepare_remote_request),
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* which inserts foreign fences into intel_context.active, does not
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* clobber the idle-barrier.
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*/
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if (intel_engine_pm_is_awake(engine)) {
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pr_err("%s is awake before starting %s!\n",
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engine->name, __func__);
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return -EINVAL;
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}
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remote = intel_context_create(engine);
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if (IS_ERR(remote))
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return PTR_ERR(remote);
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local = intel_context_create(engine);
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if (IS_ERR(local)) {
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err = PTR_ERR(local);
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goto err_remote;
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}
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saved_heartbeat = engine->props.heartbeat_interval_ms;
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engine->props.heartbeat_interval_ms = 0;
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intel_engine_pm_get(engine);
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for (pass = 0; pass <= 2; pass++) {
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err = __remote_sync(local, remote);
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if (err)
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break;
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err = __remote_sync(engine->kernel_context, remote);
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if (err)
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break;
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if (i915_active_is_idle(&remote->active)) {
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pr_err("remote context is not active; expected idle-barrier (%s pass %d)\n",
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engine->name, pass);
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err = -EINVAL;
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break;
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}
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}
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intel_engine_pm_put(engine);
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engine->props.heartbeat_interval_ms = saved_heartbeat;
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intel_context_put(local);
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err_remote:
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intel_context_put(remote);
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return err;
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}
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static int live_remote_context(void *arg)
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{
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struct intel_gt *gt = arg;
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struct intel_engine_cs *engine;
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enum intel_engine_id id;
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int err = 0;
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for_each_engine(engine, gt, id) {
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err = __live_remote_context(engine);
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if (err)
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break;
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err = igt_flush_test(gt->i915);
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if (err)
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break;
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}
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return err;
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}
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int intel_context_live_selftests(struct drm_i915_private *i915)
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{
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static const struct i915_subtest tests[] = {
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SUBTEST(live_context_size),
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SUBTEST(live_active_context),
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SUBTEST(live_remote_context),
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};
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struct intel_gt *gt = &i915->gt;
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if (intel_gt_is_wedged(gt))
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return 0;
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return intel_gt_live_subtests(tests, gt);
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}
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