Alex Dai 93f253187c drm/i915/guc: Media domain bit needed when notify GuC rc6 state ... GuC expects two bits for Render and Media domain separately when driver sends data via host2guc SAMPLE_FORCEWAKE. Bit 0 is for Render and bit 1 is for Media domain. v2: Keep sync with code for WaRsDoubleRc6WrlWithCoarsePowerGating v1: Add parameters definition to avoid magic value Signed-off-by: Alex Dai <yu.dai@intel.com> Reviewed-by: Tom O'Rourke <Tom.O'Rourke@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>		2015-09-30 17:15:12 +02:00
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drm	drm/i915/guc: Media domain bit needed when notify GuC rc6 state	2015-09-30 17:15:12 +02:00
host1x	gpu: host1x: mipi: Power down regulators when unused	2015-08-13 13:47:21 +02:00
ipu-v3	gpu/drm: Kill off set_irq_flags usage	2015-09-16 16:53:38 +02:00
vga	vga_switcheroo: Set active attribute to false for audio clients	2015-09-24 20:14:25 +02:00
Makefile