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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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3c53f5e217
Certain devices can have GDSCs' which support ON as the only state. They can't be power collapsed to either hit RET or OFF. The clients drivers for these GDSCs' however would expect the state of the core to be reset following a GDSC disable and re-enable. To do this assert/deassert reset lines every time the client driver would request the GDSC to be powered on/off instead. Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
69 lines
2.0 KiB
C
69 lines
2.0 KiB
C
/*
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* Copyright (c) 2015, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __QCOM_GDSC_H__
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#define __QCOM_GDSC_H__
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#include <linux/err.h>
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#include <linux/pm_domain.h>
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struct regmap;
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struct reset_controller_dev;
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/* Powerdomain allowable state bitfields */
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#define PWRSTS_OFF BIT(0)
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#define PWRSTS_RET BIT(1)
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#define PWRSTS_ON BIT(2)
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#define PWRSTS_OFF_ON (PWRSTS_OFF | PWRSTS_ON)
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#define PWRSTS_RET_ON (PWRSTS_RET | PWRSTS_ON)
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/**
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* struct gdsc - Globally Distributed Switch Controller
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* @pd: generic power domain
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* @regmap: regmap for MMIO accesses
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* @gdscr: gsdc control register
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* @cxcs: offsets of branch registers to toggle mem/periph bits in
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* @cxc_count: number of @cxcs
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* @pwrsts: Possible powerdomain power states
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* @resets: ids of resets associated with this gdsc
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* @reset_count: number of @resets
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* @rcdev: reset controller
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*/
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struct gdsc {
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struct generic_pm_domain pd;
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struct regmap *regmap;
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unsigned int gdscr;
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unsigned int *cxcs;
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unsigned int cxc_count;
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const u8 pwrsts;
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struct reset_controller_dev *rcdev;
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unsigned int *resets;
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unsigned int reset_count;
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};
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#ifdef CONFIG_QCOM_GDSC
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int gdsc_register(struct device *, struct gdsc **, size_t n,
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struct reset_controller_dev *, struct regmap *);
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void gdsc_unregister(struct device *);
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#else
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static inline int gdsc_register(struct device *d, struct gdsc **g, size_t n,
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struct reset_controller_dev *rcdev,
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struct regmap *r)
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{
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return -ENOSYS;
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}
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static inline void gdsc_unregister(struct device *d) {};
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#endif /* CONFIG_QCOM_GDSC */
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#endif /* __QCOM_GDSC_H__ */
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