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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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2069ecfbe1
This isn't really a quirk; calling it directly from pci_add_device makes more sense. Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
341 lines
8.3 KiB
C
341 lines
8.3 KiB
C
/*
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* drivers/pci/setup-res.c
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*
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* Extruded from code written by
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* Dave Rusling (david.rusling@reo.mts.dec.com)
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* David Mosberger (davidm@cs.arizona.edu)
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* David Miller (davem@redhat.com)
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*
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* Support routines for initializing a PCI subsystem.
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*/
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/* fixed for multiple pci buses, 1999 Andrea Arcangeli <andrea@suse.de> */
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/*
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* Nov 2000, Ivan Kokshaysky <ink@jurassic.park.msu.ru>
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* Resource sorting
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/export.h>
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#include <linux/pci.h>
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#include <linux/errno.h>
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#include <linux/ioport.h>
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#include <linux/cache.h>
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#include <linux/slab.h>
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#include "pci.h"
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void pci_update_resource(struct pci_dev *dev, int resno)
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{
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struct pci_bus_region region;
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u32 new, check, mask;
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int reg;
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enum pci_bar_type type;
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struct resource *res = dev->resource + resno;
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/*
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* Ignore resources for unimplemented BARs and unused resource slots
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* for 64 bit BARs.
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*/
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if (!res->flags)
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return;
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/*
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* Ignore non-moveable resources. This might be legacy resources for
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* which no functional BAR register exists or another important
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* system resource we shouldn't move around.
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*/
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if (res->flags & IORESOURCE_PCI_FIXED)
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return;
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pcibios_resource_to_bus(dev, ®ion, res);
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new = region.start | (res->flags & PCI_REGION_FLAG_MASK);
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if (res->flags & IORESOURCE_IO)
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mask = (u32)PCI_BASE_ADDRESS_IO_MASK;
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else
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mask = (u32)PCI_BASE_ADDRESS_MEM_MASK;
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reg = pci_resource_bar(dev, resno, &type);
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if (!reg)
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return;
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if (type != pci_bar_unknown) {
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if (!(res->flags & IORESOURCE_ROM_ENABLE))
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return;
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new |= PCI_ROM_ADDRESS_ENABLE;
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}
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pci_write_config_dword(dev, reg, new);
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pci_read_config_dword(dev, reg, &check);
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if ((new ^ check) & mask) {
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dev_err(&dev->dev, "BAR %d: error updating (%#08x != %#08x)\n",
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resno, new, check);
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}
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if (res->flags & IORESOURCE_MEM_64) {
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new = region.start >> 16 >> 16;
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pci_write_config_dword(dev, reg + 4, new);
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pci_read_config_dword(dev, reg + 4, &check);
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if (check != new) {
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dev_err(&dev->dev, "BAR %d: error updating "
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"(high %#08x != %#08x)\n", resno, new, check);
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}
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}
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res->flags &= ~IORESOURCE_UNSET;
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dev_dbg(&dev->dev, "BAR %d: set to %pR (PCI address [%#llx-%#llx])\n",
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resno, res, (unsigned long long)region.start,
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(unsigned long long)region.end);
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}
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int pci_claim_resource(struct pci_dev *dev, int resource)
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{
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struct resource *res = &dev->resource[resource];
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struct resource *root, *conflict;
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root = pci_find_parent_resource(dev, res);
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if (!root) {
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dev_info(&dev->dev, "no compatible bridge window for %pR\n",
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res);
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return -EINVAL;
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}
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conflict = request_resource_conflict(root, res);
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if (conflict) {
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dev_info(&dev->dev,
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"address space collision: %pR conflicts with %s %pR\n",
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res, conflict->name, conflict);
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return -EBUSY;
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}
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return 0;
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}
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EXPORT_SYMBOL(pci_claim_resource);
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void pci_disable_bridge_window(struct pci_dev *dev)
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{
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dev_info(&dev->dev, "disabling bridge mem windows\n");
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/* MMIO Base/Limit */
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pci_write_config_dword(dev, PCI_MEMORY_BASE, 0x0000fff0);
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/* Prefetchable MMIO Base/Limit */
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pci_write_config_dword(dev, PCI_PREF_LIMIT_UPPER32, 0);
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pci_write_config_dword(dev, PCI_PREF_MEMORY_BASE, 0x0000fff0);
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pci_write_config_dword(dev, PCI_PREF_BASE_UPPER32, 0xffffffff);
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}
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static int __pci_assign_resource(struct pci_bus *bus, struct pci_dev *dev,
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int resno, resource_size_t size, resource_size_t align)
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{
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struct resource *res = dev->resource + resno;
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resource_size_t min;
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int ret;
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min = (res->flags & IORESOURCE_IO) ? PCIBIOS_MIN_IO : PCIBIOS_MIN_MEM;
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/* First, try exact prefetching match.. */
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ret = pci_bus_alloc_resource(bus, res, size, align, min,
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IORESOURCE_PREFETCH,
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pcibios_align_resource, dev);
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if (ret < 0 && (res->flags & IORESOURCE_PREFETCH)) {
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/*
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* That failed.
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*
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* But a prefetching area can handle a non-prefetching
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* window (it will just not perform as well).
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*/
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ret = pci_bus_alloc_resource(bus, res, size, align, min, 0,
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pcibios_align_resource, dev);
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}
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return ret;
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}
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/*
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* Generic function that returns a value indicating that the device's
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* original BIOS BAR address was not saved and so is not available for
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* reinstatement.
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*
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* Can be over-ridden by architecture specific code that implements
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* reinstatement functionality rather than leaving it disabled when
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* normal allocation attempts fail.
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*/
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resource_size_t __weak pcibios_retrieve_fw_addr(struct pci_dev *dev, int idx)
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{
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return 0;
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}
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static int pci_revert_fw_address(struct resource *res, struct pci_dev *dev,
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int resno, resource_size_t size)
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{
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struct resource *root, *conflict;
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resource_size_t fw_addr, start, end;
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int ret = 0;
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fw_addr = pcibios_retrieve_fw_addr(dev, resno);
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if (!fw_addr)
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return 1;
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start = res->start;
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end = res->end;
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res->start = fw_addr;
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res->end = res->start + size - 1;
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root = pci_find_parent_resource(dev, res);
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if (!root) {
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if (res->flags & IORESOURCE_IO)
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root = &ioport_resource;
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else
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root = &iomem_resource;
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}
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dev_info(&dev->dev, "BAR %d: trying firmware assignment %pR\n",
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resno, res);
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conflict = request_resource_conflict(root, res);
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if (conflict) {
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dev_info(&dev->dev,
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"BAR %d: %pR conflicts with %s %pR\n", resno,
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res, conflict->name, conflict);
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res->start = start;
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res->end = end;
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ret = 1;
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}
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return ret;
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}
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static int _pci_assign_resource(struct pci_dev *dev, int resno, int size, resource_size_t min_align)
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{
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struct resource *res = dev->resource + resno;
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struct pci_bus *bus;
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int ret;
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char *type;
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bus = dev->bus;
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while ((ret = __pci_assign_resource(bus, dev, resno, size, min_align))) {
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if (!bus->parent || !bus->self->transparent)
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break;
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bus = bus->parent;
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}
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if (ret) {
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if (res->flags & IORESOURCE_MEM)
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if (res->flags & IORESOURCE_PREFETCH)
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type = "mem pref";
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else
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type = "mem";
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else if (res->flags & IORESOURCE_IO)
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type = "io";
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else
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type = "unknown";
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dev_info(&dev->dev,
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"BAR %d: can't assign %s (size %#llx)\n",
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resno, type, (unsigned long long) resource_size(res));
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}
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return ret;
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}
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int pci_reassign_resource(struct pci_dev *dev, int resno, resource_size_t addsize,
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resource_size_t min_align)
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{
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struct resource *res = dev->resource + resno;
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resource_size_t new_size;
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int ret;
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if (!res->parent) {
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dev_info(&dev->dev, "BAR %d: can't reassign an unassigned resource %pR "
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"\n", resno, res);
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return -EINVAL;
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}
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/* already aligned with min_align */
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new_size = resource_size(res) + addsize;
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ret = _pci_assign_resource(dev, resno, new_size, min_align);
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if (!ret) {
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res->flags &= ~IORESOURCE_STARTALIGN;
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dev_info(&dev->dev, "BAR %d: reassigned %pR\n", resno, res);
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if (resno < PCI_BRIDGE_RESOURCES)
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pci_update_resource(dev, resno);
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}
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return ret;
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}
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int pci_assign_resource(struct pci_dev *dev, int resno)
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{
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struct resource *res = dev->resource + resno;
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resource_size_t align, size;
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struct pci_bus *bus;
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int ret;
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align = pci_resource_alignment(dev, res);
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if (!align) {
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dev_info(&dev->dev, "BAR %d: can't assign %pR "
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"(bogus alignment)\n", resno, res);
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return -EINVAL;
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}
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bus = dev->bus;
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size = resource_size(res);
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ret = _pci_assign_resource(dev, resno, size, align);
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/*
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* If we failed to assign anything, let's try the address
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* where firmware left it. That at least has a chance of
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* working, which is better than just leaving it disabled.
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*/
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if (ret < 0)
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ret = pci_revert_fw_address(res, dev, resno, size);
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if (!ret) {
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res->flags &= ~IORESOURCE_STARTALIGN;
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dev_info(&dev->dev, "BAR %d: assigned %pR\n", resno, res);
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if (resno < PCI_BRIDGE_RESOURCES)
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pci_update_resource(dev, resno);
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}
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return ret;
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}
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int pci_enable_resources(struct pci_dev *dev, int mask)
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{
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u16 cmd, old_cmd;
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int i;
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struct resource *r;
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pci_read_config_word(dev, PCI_COMMAND, &cmd);
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old_cmd = cmd;
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for (i = 0; i < PCI_NUM_RESOURCES; i++) {
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if (!(mask & (1 << i)))
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continue;
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r = &dev->resource[i];
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if (!(r->flags & (IORESOURCE_IO | IORESOURCE_MEM)))
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continue;
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if ((i == PCI_ROM_RESOURCE) &&
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(!(r->flags & IORESOURCE_ROM_ENABLE)))
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continue;
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if (!r->parent) {
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dev_err(&dev->dev, "device not available "
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"(can't reserve %pR)\n", r);
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return -EINVAL;
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}
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if (r->flags & IORESOURCE_IO)
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cmd |= PCI_COMMAND_IO;
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if (r->flags & IORESOURCE_MEM)
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cmd |= PCI_COMMAND_MEMORY;
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}
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if (cmd != old_cmd) {
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dev_info(&dev->dev, "enabling device (%04x -> %04x)\n",
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old_cmd, cmd);
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pci_write_config_word(dev, PCI_COMMAND, cmd);
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}
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return 0;
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}
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