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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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396aa4451e
For test 4.2.2.5 to pass per the Link CTS Core 1.2 rev1.1 spec, the source device must attempt at least 7 times to read the EDID when it receives an I2C defer. The normal DRM code makes only 7 retries, regardless of whether or not the response is a native defer or an I2C defer. Test 4.2.2.5 fails since there are native defers interspersed with the I2C defers which results in less than 7 EDID read attempts. The solution is to add the numer of defers to the retry counter when an I2C DEFER is returned such that another read attempt will be made. This situation should normally only occur in compliance testing, however, as a worse case real-world scenario, it would result in 13 attempts ( 6 native defers, 7 I2C defers) for a single transaction to complete. The net result is a slightly slower response to an EDID read that shouldn't significantly impact overall performance. V2: - Added a check on the number of I2C Defers to limit the number of times that the retries variable will be decremented. This is to address review feedback regarding possible infinite loops from misbehaving sink devices. V3: - Fixed the limit value to 7 instead of 8 to get the correct retry count. - Combined the increment of the defer count into the if-statement V4: - Removed i915 tag from subject as the patch is not i915-specific V5: - Updated the for-loop to add the number of i2c defers to the retry counter such that the correct number of retry attempts will be made Signed-off-by: Todd Previte <tprevite@gmail.com> Cc: dri-devel@lists.freedesktop.org Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
659 lines
18 KiB
C
659 lines
18 KiB
C
/*
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* Copyright © 2009 Keith Packard
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*
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* Permission to use, copy, modify, distribute, and sell this software and its
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* documentation for any purpose is hereby granted without fee, provided that
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* the above copyright notice appear in all copies and that both that copyright
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* notice and this permission notice appear in supporting documentation, and
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* that the name of the copyright holders not be used in advertising or
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* publicity pertaining to distribution of the software without specific,
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* written prior permission. The copyright holders make no representations
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* about the suitability of this software for any purpose. It is provided "as
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* is" without express or implied warranty.
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*
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* THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
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* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
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* EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
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* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
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* DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
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* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
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* OF THIS SOFTWARE.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/sched.h>
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#include <linux/i2c.h>
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#include <drm/drm_dp_helper.h>
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#include <drm/drmP.h>
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/**
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* DOC: dp helpers
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*
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* These functions contain some common logic and helpers at various abstraction
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* levels to deal with Display Port sink devices and related things like DP aux
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* channel transfers, EDID reading over DP aux channels, decoding certain DPCD
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* blocks, ...
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*/
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/* Helpers for DP link training */
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static u8 dp_link_status(const u8 link_status[DP_LINK_STATUS_SIZE], int r)
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{
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return link_status[r - DP_LANE0_1_STATUS];
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}
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static u8 dp_get_lane_status(const u8 link_status[DP_LINK_STATUS_SIZE],
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int lane)
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{
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int i = DP_LANE0_1_STATUS + (lane >> 1);
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int s = (lane & 1) * 4;
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u8 l = dp_link_status(link_status, i);
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return (l >> s) & 0xf;
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}
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bool drm_dp_channel_eq_ok(const u8 link_status[DP_LINK_STATUS_SIZE],
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int lane_count)
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{
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u8 lane_align;
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u8 lane_status;
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int lane;
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lane_align = dp_link_status(link_status,
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DP_LANE_ALIGN_STATUS_UPDATED);
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if ((lane_align & DP_INTERLANE_ALIGN_DONE) == 0)
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return false;
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for (lane = 0; lane < lane_count; lane++) {
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lane_status = dp_get_lane_status(link_status, lane);
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if ((lane_status & DP_CHANNEL_EQ_BITS) != DP_CHANNEL_EQ_BITS)
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return false;
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}
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return true;
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}
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EXPORT_SYMBOL(drm_dp_channel_eq_ok);
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bool drm_dp_clock_recovery_ok(const u8 link_status[DP_LINK_STATUS_SIZE],
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int lane_count)
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{
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int lane;
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u8 lane_status;
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for (lane = 0; lane < lane_count; lane++) {
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lane_status = dp_get_lane_status(link_status, lane);
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if ((lane_status & DP_LANE_CR_DONE) == 0)
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return false;
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}
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return true;
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}
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EXPORT_SYMBOL(drm_dp_clock_recovery_ok);
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u8 drm_dp_get_adjust_request_voltage(const u8 link_status[DP_LINK_STATUS_SIZE],
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int lane)
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{
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int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1);
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int s = ((lane & 1) ?
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DP_ADJUST_VOLTAGE_SWING_LANE1_SHIFT :
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DP_ADJUST_VOLTAGE_SWING_LANE0_SHIFT);
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u8 l = dp_link_status(link_status, i);
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return ((l >> s) & 0x3) << DP_TRAIN_VOLTAGE_SWING_SHIFT;
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}
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EXPORT_SYMBOL(drm_dp_get_adjust_request_voltage);
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u8 drm_dp_get_adjust_request_pre_emphasis(const u8 link_status[DP_LINK_STATUS_SIZE],
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int lane)
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{
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int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1);
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int s = ((lane & 1) ?
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DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT :
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DP_ADJUST_PRE_EMPHASIS_LANE0_SHIFT);
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u8 l = dp_link_status(link_status, i);
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return ((l >> s) & 0x3) << DP_TRAIN_PRE_EMPHASIS_SHIFT;
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}
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EXPORT_SYMBOL(drm_dp_get_adjust_request_pre_emphasis);
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void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) {
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if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0)
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udelay(100);
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else
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mdelay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] * 4);
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}
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EXPORT_SYMBOL(drm_dp_link_train_clock_recovery_delay);
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void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) {
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if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0)
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udelay(400);
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else
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mdelay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] * 4);
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}
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EXPORT_SYMBOL(drm_dp_link_train_channel_eq_delay);
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u8 drm_dp_link_rate_to_bw_code(int link_rate)
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{
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switch (link_rate) {
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case 162000:
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default:
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return DP_LINK_BW_1_62;
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case 270000:
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return DP_LINK_BW_2_7;
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case 540000:
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return DP_LINK_BW_5_4;
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}
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}
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EXPORT_SYMBOL(drm_dp_link_rate_to_bw_code);
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int drm_dp_bw_code_to_link_rate(u8 link_bw)
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{
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switch (link_bw) {
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case DP_LINK_BW_1_62:
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default:
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return 162000;
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case DP_LINK_BW_2_7:
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return 270000;
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case DP_LINK_BW_5_4:
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return 540000;
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}
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}
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EXPORT_SYMBOL(drm_dp_bw_code_to_link_rate);
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/**
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* DOC: dp helpers
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*
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* The DisplayPort AUX channel is an abstraction to allow generic, driver-
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* independent access to AUX functionality. Drivers can take advantage of
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* this by filling in the fields of the drm_dp_aux structure.
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*
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* Transactions are described using a hardware-independent drm_dp_aux_msg
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* structure, which is passed into a driver's .transfer() implementation.
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* Both native and I2C-over-AUX transactions are supported.
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*/
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static int drm_dp_dpcd_access(struct drm_dp_aux *aux, u8 request,
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unsigned int offset, void *buffer, size_t size)
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{
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struct drm_dp_aux_msg msg;
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unsigned int retry;
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int err;
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memset(&msg, 0, sizeof(msg));
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msg.address = offset;
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msg.request = request;
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msg.buffer = buffer;
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msg.size = size;
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/*
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* The specification doesn't give any recommendation on how often to
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* retry native transactions. We used to retry 7 times like for
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* aux i2c transactions but real world devices this wasn't
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* sufficient, bump to 32 which makes Dell 4k monitors happier.
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*/
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for (retry = 0; retry < 32; retry++) {
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mutex_lock(&aux->hw_mutex);
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err = aux->transfer(aux, &msg);
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mutex_unlock(&aux->hw_mutex);
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if (err < 0) {
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if (err == -EBUSY)
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continue;
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return err;
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}
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switch (msg.reply & DP_AUX_NATIVE_REPLY_MASK) {
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case DP_AUX_NATIVE_REPLY_ACK:
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if (err < size)
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return -EPROTO;
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return err;
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case DP_AUX_NATIVE_REPLY_NACK:
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return -EIO;
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case DP_AUX_NATIVE_REPLY_DEFER:
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usleep_range(400, 500);
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break;
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}
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}
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DRM_DEBUG_KMS("too many retries, giving up\n");
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return -EIO;
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}
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/**
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* drm_dp_dpcd_read() - read a series of bytes from the DPCD
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* @aux: DisplayPort AUX channel
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* @offset: address of the (first) register to read
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* @buffer: buffer to store the register values
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* @size: number of bytes in @buffer
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*
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* Returns the number of bytes transferred on success, or a negative error
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* code on failure. -EIO is returned if the request was NAKed by the sink or
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* if the retry count was exceeded. If not all bytes were transferred, this
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* function returns -EPROTO. Errors from the underlying AUX channel transfer
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* function, with the exception of -EBUSY (which causes the transaction to
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* be retried), are propagated to the caller.
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*/
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ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset,
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void *buffer, size_t size)
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{
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return drm_dp_dpcd_access(aux, DP_AUX_NATIVE_READ, offset, buffer,
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size);
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}
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EXPORT_SYMBOL(drm_dp_dpcd_read);
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/**
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* drm_dp_dpcd_write() - write a series of bytes to the DPCD
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* @aux: DisplayPort AUX channel
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* @offset: address of the (first) register to write
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* @buffer: buffer containing the values to write
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* @size: number of bytes in @buffer
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*
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* Returns the number of bytes transferred on success, or a negative error
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* code on failure. -EIO is returned if the request was NAKed by the sink or
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* if the retry count was exceeded. If not all bytes were transferred, this
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* function returns -EPROTO. Errors from the underlying AUX channel transfer
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* function, with the exception of -EBUSY (which causes the transaction to
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* be retried), are propagated to the caller.
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*/
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ssize_t drm_dp_dpcd_write(struct drm_dp_aux *aux, unsigned int offset,
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void *buffer, size_t size)
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{
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return drm_dp_dpcd_access(aux, DP_AUX_NATIVE_WRITE, offset, buffer,
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size);
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}
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EXPORT_SYMBOL(drm_dp_dpcd_write);
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/**
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* drm_dp_dpcd_read_link_status() - read DPCD link status (bytes 0x202-0x207)
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* @aux: DisplayPort AUX channel
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* @status: buffer to store the link status in (must be at least 6 bytes)
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*
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* Returns the number of bytes transferred on success or a negative error
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* code on failure.
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*/
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int drm_dp_dpcd_read_link_status(struct drm_dp_aux *aux,
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u8 status[DP_LINK_STATUS_SIZE])
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{
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return drm_dp_dpcd_read(aux, DP_LANE0_1_STATUS, status,
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DP_LINK_STATUS_SIZE);
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}
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EXPORT_SYMBOL(drm_dp_dpcd_read_link_status);
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/**
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* drm_dp_link_probe() - probe a DisplayPort link for capabilities
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* @aux: DisplayPort AUX channel
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* @link: pointer to structure in which to return link capabilities
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*
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* The structure filled in by this function can usually be passed directly
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* into drm_dp_link_power_up() and drm_dp_link_configure() to power up and
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* configure the link based on the link's capabilities.
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*
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* Returns 0 on success or a negative error code on failure.
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*/
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int drm_dp_link_probe(struct drm_dp_aux *aux, struct drm_dp_link *link)
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{
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u8 values[3];
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int err;
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memset(link, 0, sizeof(*link));
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err = drm_dp_dpcd_read(aux, DP_DPCD_REV, values, sizeof(values));
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if (err < 0)
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return err;
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link->revision = values[0];
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link->rate = drm_dp_bw_code_to_link_rate(values[1]);
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link->num_lanes = values[2] & DP_MAX_LANE_COUNT_MASK;
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if (values[2] & DP_ENHANCED_FRAME_CAP)
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link->capabilities |= DP_LINK_CAP_ENHANCED_FRAMING;
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return 0;
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}
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EXPORT_SYMBOL(drm_dp_link_probe);
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/**
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* drm_dp_link_power_up() - power up a DisplayPort link
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* @aux: DisplayPort AUX channel
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* @link: pointer to a structure containing the link configuration
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*
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* Returns 0 on success or a negative error code on failure.
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*/
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int drm_dp_link_power_up(struct drm_dp_aux *aux, struct drm_dp_link *link)
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{
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u8 value;
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int err;
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/* DP_SET_POWER register is only available on DPCD v1.1 and later */
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if (link->revision < 0x11)
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return 0;
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err = drm_dp_dpcd_readb(aux, DP_SET_POWER, &value);
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if (err < 0)
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return err;
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value &= ~DP_SET_POWER_MASK;
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value |= DP_SET_POWER_D0;
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err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value);
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if (err < 0)
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return err;
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/*
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* According to the DP 1.1 specification, a "Sink Device must exit the
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* power saving state within 1 ms" (Section 2.5.3.1, Table 5-52, "Sink
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* Control Field" (register 0x600).
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*/
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usleep_range(1000, 2000);
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return 0;
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}
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EXPORT_SYMBOL(drm_dp_link_power_up);
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/**
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* drm_dp_link_power_down() - power down a DisplayPort link
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* @aux: DisplayPort AUX channel
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* @link: pointer to a structure containing the link configuration
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*
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* Returns 0 on success or a negative error code on failure.
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*/
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int drm_dp_link_power_down(struct drm_dp_aux *aux, struct drm_dp_link *link)
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{
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u8 value;
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int err;
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/* DP_SET_POWER register is only available on DPCD v1.1 and later */
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if (link->revision < 0x11)
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return 0;
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err = drm_dp_dpcd_readb(aux, DP_SET_POWER, &value);
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if (err < 0)
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return err;
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value &= ~DP_SET_POWER_MASK;
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value |= DP_SET_POWER_D3;
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err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value);
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if (err < 0)
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return err;
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return 0;
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}
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EXPORT_SYMBOL(drm_dp_link_power_down);
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/**
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* drm_dp_link_configure() - configure a DisplayPort link
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* @aux: DisplayPort AUX channel
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* @link: pointer to a structure containing the link configuration
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*
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* Returns 0 on success or a negative error code on failure.
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*/
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int drm_dp_link_configure(struct drm_dp_aux *aux, struct drm_dp_link *link)
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{
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u8 values[2];
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int err;
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values[0] = drm_dp_link_rate_to_bw_code(link->rate);
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values[1] = link->num_lanes;
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if (link->capabilities & DP_LINK_CAP_ENHANCED_FRAMING)
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values[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN;
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err = drm_dp_dpcd_write(aux, DP_LINK_BW_SET, values, sizeof(values));
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if (err < 0)
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return err;
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return 0;
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}
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EXPORT_SYMBOL(drm_dp_link_configure);
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/*
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* I2C-over-AUX implementation
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*/
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static u32 drm_dp_i2c_functionality(struct i2c_adapter *adapter)
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{
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return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL |
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I2C_FUNC_SMBUS_READ_BLOCK_DATA |
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I2C_FUNC_SMBUS_BLOCK_PROC_CALL |
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I2C_FUNC_10BIT_ADDR;
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}
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/*
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* Transfer a single I2C-over-AUX message and handle various error conditions,
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* retrying the transaction as appropriate. It is assumed that the
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* aux->transfer function does not modify anything in the msg other than the
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* reply field.
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*
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* Returns bytes transferred on success, or a negative error code on failure.
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*/
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static int drm_dp_i2c_do_msg(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
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{
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unsigned int retry, defer_i2c;
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int ret;
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/*
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* DP1.2 sections 2.7.7.1.5.6.1 and 2.7.7.1.6.6.1: A DP Source device
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* is required to retry at least seven times upon receiving AUX_DEFER
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* before giving up the AUX transaction.
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*/
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for (retry = 0, defer_i2c = 0; retry < (7 + defer_i2c); retry++) {
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mutex_lock(&aux->hw_mutex);
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ret = aux->transfer(aux, msg);
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mutex_unlock(&aux->hw_mutex);
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if (ret < 0) {
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if (ret == -EBUSY)
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continue;
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DRM_DEBUG_KMS("transaction failed: %d\n", ret);
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return ret;
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}
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switch (msg->reply & DP_AUX_NATIVE_REPLY_MASK) {
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case DP_AUX_NATIVE_REPLY_ACK:
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/*
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* For I2C-over-AUX transactions this isn't enough, we
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* need to check for the I2C ACK reply.
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*/
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break;
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case DP_AUX_NATIVE_REPLY_NACK:
|
|
DRM_DEBUG_KMS("native nack (result=%d, size=%zu)\n", ret, msg->size);
|
|
return -EREMOTEIO;
|
|
|
|
case DP_AUX_NATIVE_REPLY_DEFER:
|
|
DRM_DEBUG_KMS("native defer\n");
|
|
/*
|
|
* We could check for I2C bit rate capabilities and if
|
|
* available adjust this interval. We could also be
|
|
* more careful with DP-to-legacy adapters where a
|
|
* long legacy cable may force very low I2C bit rates.
|
|
*
|
|
* For now just defer for long enough to hopefully be
|
|
* safe for all use-cases.
|
|
*/
|
|
usleep_range(500, 600);
|
|
continue;
|
|
|
|
default:
|
|
DRM_ERROR("invalid native reply %#04x\n", msg->reply);
|
|
return -EREMOTEIO;
|
|
}
|
|
|
|
switch (msg->reply & DP_AUX_I2C_REPLY_MASK) {
|
|
case DP_AUX_I2C_REPLY_ACK:
|
|
/*
|
|
* Both native ACK and I2C ACK replies received. We
|
|
* can assume the transfer was successful.
|
|
*/
|
|
return ret;
|
|
|
|
case DP_AUX_I2C_REPLY_NACK:
|
|
DRM_DEBUG_KMS("I2C nack (result=%d, size=%zu\n", ret, msg->size);
|
|
aux->i2c_nack_count++;
|
|
return -EREMOTEIO;
|
|
|
|
case DP_AUX_I2C_REPLY_DEFER:
|
|
DRM_DEBUG_KMS("I2C defer\n");
|
|
/* DP Compliance Test 4.2.2.5 Requirement:
|
|
* Must have at least 7 retries for I2C defers on the
|
|
* transaction to pass this test
|
|
*/
|
|
aux->i2c_defer_count++;
|
|
if (defer_i2c < 7)
|
|
defer_i2c++;
|
|
usleep_range(400, 500);
|
|
continue;
|
|
|
|
default:
|
|
DRM_ERROR("invalid I2C reply %#04x\n", msg->reply);
|
|
return -EREMOTEIO;
|
|
}
|
|
}
|
|
|
|
DRM_DEBUG_KMS("too many retries, giving up\n");
|
|
return -EREMOTEIO;
|
|
}
|
|
|
|
/*
|
|
* Keep retrying drm_dp_i2c_do_msg until all data has been transferred.
|
|
*
|
|
* Returns an error code on failure, or a recommended transfer size on success.
|
|
*/
|
|
static int drm_dp_i2c_drain_msg(struct drm_dp_aux *aux, struct drm_dp_aux_msg *orig_msg)
|
|
{
|
|
int err, ret = orig_msg->size;
|
|
struct drm_dp_aux_msg msg = *orig_msg;
|
|
|
|
while (msg.size > 0) {
|
|
err = drm_dp_i2c_do_msg(aux, &msg);
|
|
if (err <= 0)
|
|
return err == 0 ? -EPROTO : err;
|
|
|
|
if (err < msg.size && err < ret) {
|
|
DRM_DEBUG_KMS("Partial I2C reply: requested %zu bytes got %d bytes\n",
|
|
msg.size, err);
|
|
ret = err;
|
|
}
|
|
|
|
msg.size -= err;
|
|
msg.buffer += err;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
/*
|
|
* Bizlink designed DP->DVI-D Dual Link adapters require the I2C over AUX
|
|
* packets to be as large as possible. If not, the I2C transactions never
|
|
* succeed. Hence the default is maximum.
|
|
*/
|
|
static int dp_aux_i2c_transfer_size __read_mostly = DP_AUX_MAX_PAYLOAD_BYTES;
|
|
module_param_unsafe(dp_aux_i2c_transfer_size, int, 0644);
|
|
MODULE_PARM_DESC(dp_aux_i2c_transfer_size,
|
|
"Number of bytes to transfer in a single I2C over DP AUX CH message, (1-16, default 16)");
|
|
|
|
static int drm_dp_i2c_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs,
|
|
int num)
|
|
{
|
|
struct drm_dp_aux *aux = adapter->algo_data;
|
|
unsigned int i, j;
|
|
unsigned transfer_size;
|
|
struct drm_dp_aux_msg msg;
|
|
int err = 0;
|
|
|
|
dp_aux_i2c_transfer_size = clamp(dp_aux_i2c_transfer_size, 1, DP_AUX_MAX_PAYLOAD_BYTES);
|
|
|
|
memset(&msg, 0, sizeof(msg));
|
|
|
|
for (i = 0; i < num; i++) {
|
|
msg.address = msgs[i].addr;
|
|
msg.request = (msgs[i].flags & I2C_M_RD) ?
|
|
DP_AUX_I2C_READ :
|
|
DP_AUX_I2C_WRITE;
|
|
msg.request |= DP_AUX_I2C_MOT;
|
|
/* Send a bare address packet to start the transaction.
|
|
* Zero sized messages specify an address only (bare
|
|
* address) transaction.
|
|
*/
|
|
msg.buffer = NULL;
|
|
msg.size = 0;
|
|
err = drm_dp_i2c_do_msg(aux, &msg);
|
|
if (err < 0)
|
|
break;
|
|
/* We want each transaction to be as large as possible, but
|
|
* we'll go to smaller sizes if the hardware gives us a
|
|
* short reply.
|
|
*/
|
|
transfer_size = dp_aux_i2c_transfer_size;
|
|
for (j = 0; j < msgs[i].len; j += msg.size) {
|
|
msg.buffer = msgs[i].buf + j;
|
|
msg.size = min(transfer_size, msgs[i].len - j);
|
|
|
|
err = drm_dp_i2c_drain_msg(aux, &msg);
|
|
if (err < 0)
|
|
break;
|
|
transfer_size = err;
|
|
}
|
|
if (err < 0)
|
|
break;
|
|
}
|
|
if (err >= 0)
|
|
err = num;
|
|
/* Send a bare address packet to close out the transaction.
|
|
* Zero sized messages specify an address only (bare
|
|
* address) transaction.
|
|
*/
|
|
msg.request &= ~DP_AUX_I2C_MOT;
|
|
msg.buffer = NULL;
|
|
msg.size = 0;
|
|
(void)drm_dp_i2c_do_msg(aux, &msg);
|
|
|
|
return err;
|
|
}
|
|
|
|
static const struct i2c_algorithm drm_dp_i2c_algo = {
|
|
.functionality = drm_dp_i2c_functionality,
|
|
.master_xfer = drm_dp_i2c_xfer,
|
|
};
|
|
|
|
/**
|
|
* drm_dp_aux_register() - initialise and register aux channel
|
|
* @aux: DisplayPort AUX channel
|
|
*
|
|
* Returns 0 on success or a negative error code on failure.
|
|
*/
|
|
int drm_dp_aux_register(struct drm_dp_aux *aux)
|
|
{
|
|
mutex_init(&aux->hw_mutex);
|
|
|
|
aux->ddc.algo = &drm_dp_i2c_algo;
|
|
aux->ddc.algo_data = aux;
|
|
aux->ddc.retries = 3;
|
|
|
|
aux->ddc.class = I2C_CLASS_DDC;
|
|
aux->ddc.owner = THIS_MODULE;
|
|
aux->ddc.dev.parent = aux->dev;
|
|
aux->ddc.dev.of_node = aux->dev->of_node;
|
|
|
|
strlcpy(aux->ddc.name, aux->name ? aux->name : dev_name(aux->dev),
|
|
sizeof(aux->ddc.name));
|
|
|
|
return i2c_add_adapter(&aux->ddc);
|
|
}
|
|
EXPORT_SYMBOL(drm_dp_aux_register);
|
|
|
|
/**
|
|
* drm_dp_aux_unregister() - unregister an AUX adapter
|
|
* @aux: DisplayPort AUX channel
|
|
*/
|
|
void drm_dp_aux_unregister(struct drm_dp_aux *aux)
|
|
{
|
|
i2c_del_adapter(&aux->ddc);
|
|
}
|
|
EXPORT_SYMBOL(drm_dp_aux_unregister);
|