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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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1753b40f5c
Precedence of & and >> is not the same and is not left to right. shift has higher precedence and should be done after the mask. Add parentheses around the mask. Signed-off-by: Joe Perches <joe@perches.com> Acked-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
471 lines
11 KiB
C
471 lines
11 KiB
C
/*
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* wm8350-core.c -- Device access for Wolfson WM8350
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*
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* Copyright 2007, 2008 Wolfson Microelectronics PLC.
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*
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* Author: Liam Girdwood, Mark Brown
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/bug.h>
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#include <linux/device.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/regmap.h>
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#include <linux/workqueue.h>
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#include <linux/mfd/wm8350/core.h>
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#include <linux/mfd/wm8350/audio.h>
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#include <linux/mfd/wm8350/comparator.h>
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#include <linux/mfd/wm8350/gpio.h>
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#include <linux/mfd/wm8350/pmic.h>
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#include <linux/mfd/wm8350/rtc.h>
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#include <linux/mfd/wm8350/supply.h>
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#include <linux/mfd/wm8350/wdt.h>
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#define WM8350_CLOCK_CONTROL_1 0x28
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#define WM8350_AIF_TEST 0x74
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/* debug */
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#define WM8350_BUS_DEBUG 0
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#if WM8350_BUS_DEBUG
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#define dump(regs, src) do { \
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int i_; \
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u16 *src_ = src; \
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printk(KERN_DEBUG); \
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for (i_ = 0; i_ < regs; i_++) \
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printk(" 0x%4.4x", *src_++); \
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printk("\n"); \
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} while (0);
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#else
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#define dump(bytes, src)
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#endif
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#define WM8350_LOCK_DEBUG 0
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#if WM8350_LOCK_DEBUG
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#define ldbg(format, arg...) printk(format, ## arg)
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#else
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#define ldbg(format, arg...)
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#endif
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/*
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* WM8350 Device IO
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*/
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static DEFINE_MUTEX(reg_lock_mutex);
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/*
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* Safe read, modify, write methods
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*/
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int wm8350_clear_bits(struct wm8350 *wm8350, u16 reg, u16 mask)
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{
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return regmap_update_bits(wm8350->regmap, reg, mask, 0);
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}
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EXPORT_SYMBOL_GPL(wm8350_clear_bits);
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int wm8350_set_bits(struct wm8350 *wm8350, u16 reg, u16 mask)
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{
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return regmap_update_bits(wm8350->regmap, reg, mask, mask);
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}
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EXPORT_SYMBOL_GPL(wm8350_set_bits);
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u16 wm8350_reg_read(struct wm8350 *wm8350, int reg)
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{
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unsigned int data;
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int err;
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err = regmap_read(wm8350->regmap, reg, &data);
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if (err)
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dev_err(wm8350->dev, "read from reg R%d failed\n", reg);
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return data;
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}
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EXPORT_SYMBOL_GPL(wm8350_reg_read);
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int wm8350_reg_write(struct wm8350 *wm8350, int reg, u16 val)
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{
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int ret;
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ret = regmap_write(wm8350->regmap, reg, val);
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if (ret)
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dev_err(wm8350->dev, "write to reg R%d failed\n", reg);
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return ret;
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}
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EXPORT_SYMBOL_GPL(wm8350_reg_write);
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int wm8350_block_read(struct wm8350 *wm8350, int start_reg, int regs,
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u16 *dest)
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{
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int err = 0;
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err = regmap_bulk_read(wm8350->regmap, start_reg, dest, regs);
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if (err)
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dev_err(wm8350->dev, "block read starting from R%d failed\n",
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start_reg);
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return err;
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}
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EXPORT_SYMBOL_GPL(wm8350_block_read);
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int wm8350_block_write(struct wm8350 *wm8350, int start_reg, int regs,
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u16 *src)
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{
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int ret = 0;
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ret = regmap_bulk_write(wm8350->regmap, start_reg, src, regs);
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if (ret)
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dev_err(wm8350->dev, "block write starting at R%d failed\n",
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start_reg);
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return ret;
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}
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EXPORT_SYMBOL_GPL(wm8350_block_write);
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/**
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* wm8350_reg_lock()
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*
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* The WM8350 has a hardware lock which can be used to prevent writes to
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* some registers (generally those which can cause particularly serious
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* problems if misused). This function enables that lock.
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*/
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int wm8350_reg_lock(struct wm8350 *wm8350)
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{
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int ret;
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mutex_lock(®_lock_mutex);
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ldbg(__func__);
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ret = wm8350_reg_write(wm8350, WM8350_SECURITY, WM8350_LOCK_KEY);
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if (ret)
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dev_err(wm8350->dev, "lock failed\n");
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wm8350->unlocked = false;
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mutex_unlock(®_lock_mutex);
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return ret;
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}
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EXPORT_SYMBOL_GPL(wm8350_reg_lock);
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/**
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* wm8350_reg_unlock()
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*
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* The WM8350 has a hardware lock which can be used to prevent writes to
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* some registers (generally those which can cause particularly serious
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* problems if misused). This function disables that lock so updates
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* can be performed. For maximum safety this should be done only when
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* required.
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*/
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int wm8350_reg_unlock(struct wm8350 *wm8350)
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{
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int ret;
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mutex_lock(®_lock_mutex);
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ldbg(__func__);
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ret = wm8350_reg_write(wm8350, WM8350_SECURITY, WM8350_UNLOCK_KEY);
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if (ret)
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dev_err(wm8350->dev, "unlock failed\n");
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wm8350->unlocked = true;
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mutex_unlock(®_lock_mutex);
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return ret;
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}
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EXPORT_SYMBOL_GPL(wm8350_reg_unlock);
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int wm8350_read_auxadc(struct wm8350 *wm8350, int channel, int scale, int vref)
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{
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u16 reg, result = 0;
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if (channel < WM8350_AUXADC_AUX1 || channel > WM8350_AUXADC_TEMP)
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return -EINVAL;
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if (channel >= WM8350_AUXADC_USB && channel <= WM8350_AUXADC_TEMP
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&& (scale != 0 || vref != 0))
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return -EINVAL;
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mutex_lock(&wm8350->auxadc_mutex);
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/* Turn on the ADC */
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reg = wm8350_reg_read(wm8350, WM8350_POWER_MGMT_5);
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wm8350_reg_write(wm8350, WM8350_POWER_MGMT_5, reg | WM8350_AUXADC_ENA);
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if (scale || vref) {
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reg = scale << 13;
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reg |= vref << 12;
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wm8350_reg_write(wm8350, WM8350_AUX1_READBACK + channel, reg);
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}
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reg = wm8350_reg_read(wm8350, WM8350_DIGITISER_CONTROL_1);
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reg |= 1 << channel | WM8350_AUXADC_POLL;
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wm8350_reg_write(wm8350, WM8350_DIGITISER_CONTROL_1, reg);
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/* If a late IRQ left the completion signalled then consume
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* the completion. */
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try_wait_for_completion(&wm8350->auxadc_done);
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/* We ignore the result of the completion and just check for a
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* conversion result, allowing us to soldier on if the IRQ
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* infrastructure is not set up for the chip. */
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wait_for_completion_timeout(&wm8350->auxadc_done, msecs_to_jiffies(5));
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reg = wm8350_reg_read(wm8350, WM8350_DIGITISER_CONTROL_1);
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if (reg & WM8350_AUXADC_POLL)
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dev_err(wm8350->dev, "adc chn %d read timeout\n", channel);
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else
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result = wm8350_reg_read(wm8350,
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WM8350_AUX1_READBACK + channel);
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/* Turn off the ADC */
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reg = wm8350_reg_read(wm8350, WM8350_POWER_MGMT_5);
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wm8350_reg_write(wm8350, WM8350_POWER_MGMT_5,
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reg & ~WM8350_AUXADC_ENA);
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mutex_unlock(&wm8350->auxadc_mutex);
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return result & WM8350_AUXADC_DATA1_MASK;
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}
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EXPORT_SYMBOL_GPL(wm8350_read_auxadc);
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static irqreturn_t wm8350_auxadc_irq(int irq, void *irq_data)
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{
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struct wm8350 *wm8350 = irq_data;
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complete(&wm8350->auxadc_done);
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return IRQ_HANDLED;
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}
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/*
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* Register a client device. This is non-fatal since there is no need to
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* fail the entire device init due to a single platform device failing.
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*/
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static void wm8350_client_dev_register(struct wm8350 *wm8350,
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const char *name,
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struct platform_device **pdev)
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{
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int ret;
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*pdev = platform_device_alloc(name, -1);
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if (*pdev == NULL) {
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dev_err(wm8350->dev, "Failed to allocate %s\n", name);
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return;
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}
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(*pdev)->dev.parent = wm8350->dev;
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platform_set_drvdata(*pdev, wm8350);
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ret = platform_device_add(*pdev);
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if (ret != 0) {
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dev_err(wm8350->dev, "Failed to register %s: %d\n", name, ret);
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platform_device_put(*pdev);
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*pdev = NULL;
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}
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}
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int wm8350_device_init(struct wm8350 *wm8350, int irq,
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struct wm8350_platform_data *pdata)
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{
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int ret;
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unsigned int id1, id2, mask_rev;
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unsigned int cust_id, mode, chip_rev;
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dev_set_drvdata(wm8350->dev, wm8350);
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/* get WM8350 revision and config mode */
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ret = regmap_read(wm8350->regmap, WM8350_RESET_ID, &id1);
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if (ret != 0) {
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dev_err(wm8350->dev, "Failed to read ID: %d\n", ret);
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goto err;
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}
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ret = regmap_read(wm8350->regmap, WM8350_ID, &id2);
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if (ret != 0) {
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dev_err(wm8350->dev, "Failed to read ID: %d\n", ret);
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goto err;
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}
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ret = regmap_read(wm8350->regmap, WM8350_REVISION, &mask_rev);
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if (ret != 0) {
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dev_err(wm8350->dev, "Failed to read revision: %d\n", ret);
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goto err;
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}
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if (id1 != 0x6143) {
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dev_err(wm8350->dev,
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"Device with ID %x is not a WM8350\n", id1);
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ret = -ENODEV;
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goto err;
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}
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mode = (id2 & WM8350_CONF_STS_MASK) >> 10;
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cust_id = id2 & WM8350_CUST_ID_MASK;
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chip_rev = (id2 & WM8350_CHIP_REV_MASK) >> 12;
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dev_info(wm8350->dev,
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"CONF_STS %d, CUST_ID %d, MASK_REV %d, CHIP_REV %d\n",
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mode, cust_id, mask_rev, chip_rev);
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if (cust_id != 0) {
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dev_err(wm8350->dev, "Unsupported CUST_ID\n");
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ret = -ENODEV;
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goto err;
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}
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switch (mask_rev) {
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case 0:
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wm8350->pmic.max_dcdc = WM8350_DCDC_6;
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wm8350->pmic.max_isink = WM8350_ISINK_B;
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switch (chip_rev) {
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case WM8350_REV_E:
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dev_info(wm8350->dev, "WM8350 Rev E\n");
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break;
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case WM8350_REV_F:
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dev_info(wm8350->dev, "WM8350 Rev F\n");
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break;
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case WM8350_REV_G:
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dev_info(wm8350->dev, "WM8350 Rev G\n");
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wm8350->power.rev_g_coeff = 1;
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break;
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case WM8350_REV_H:
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dev_info(wm8350->dev, "WM8350 Rev H\n");
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wm8350->power.rev_g_coeff = 1;
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break;
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default:
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/* For safety we refuse to run on unknown hardware */
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dev_err(wm8350->dev, "Unknown WM8350 CHIP_REV\n");
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ret = -ENODEV;
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goto err;
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}
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break;
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case 1:
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wm8350->pmic.max_dcdc = WM8350_DCDC_4;
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wm8350->pmic.max_isink = WM8350_ISINK_A;
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switch (chip_rev) {
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case 0:
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dev_info(wm8350->dev, "WM8351 Rev A\n");
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wm8350->power.rev_g_coeff = 1;
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break;
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case 1:
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dev_info(wm8350->dev, "WM8351 Rev B\n");
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wm8350->power.rev_g_coeff = 1;
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break;
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default:
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dev_err(wm8350->dev, "Unknown WM8351 CHIP_REV\n");
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ret = -ENODEV;
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goto err;
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}
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break;
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case 2:
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wm8350->pmic.max_dcdc = WM8350_DCDC_6;
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wm8350->pmic.max_isink = WM8350_ISINK_B;
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switch (chip_rev) {
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case 0:
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dev_info(wm8350->dev, "WM8352 Rev A\n");
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wm8350->power.rev_g_coeff = 1;
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break;
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default:
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dev_err(wm8350->dev, "Unknown WM8352 CHIP_REV\n");
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ret = -ENODEV;
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goto err;
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}
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break;
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default:
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dev_err(wm8350->dev, "Unknown MASK_REV\n");
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ret = -ENODEV;
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goto err;
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}
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mutex_init(&wm8350->auxadc_mutex);
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init_completion(&wm8350->auxadc_done);
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ret = wm8350_irq_init(wm8350, irq, pdata);
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if (ret < 0)
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goto err;
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if (wm8350->irq_base) {
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ret = request_threaded_irq(wm8350->irq_base +
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WM8350_IRQ_AUXADC_DATARDY,
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NULL, wm8350_auxadc_irq, 0,
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"auxadc", wm8350);
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if (ret < 0)
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dev_warn(wm8350->dev,
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"Failed to request AUXADC IRQ: %d\n", ret);
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}
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if (pdata && pdata->init) {
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ret = pdata->init(wm8350);
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if (ret != 0) {
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dev_err(wm8350->dev, "Platform init() failed: %d\n",
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ret);
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goto err_irq;
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}
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}
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wm8350_reg_write(wm8350, WM8350_SYSTEM_INTERRUPTS_MASK, 0x0);
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wm8350_client_dev_register(wm8350, "wm8350-codec",
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&(wm8350->codec.pdev));
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wm8350_client_dev_register(wm8350, "wm8350-gpio",
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&(wm8350->gpio.pdev));
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wm8350_client_dev_register(wm8350, "wm8350-hwmon",
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&(wm8350->hwmon.pdev));
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wm8350_client_dev_register(wm8350, "wm8350-power",
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&(wm8350->power.pdev));
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wm8350_client_dev_register(wm8350, "wm8350-rtc", &(wm8350->rtc.pdev));
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wm8350_client_dev_register(wm8350, "wm8350-wdt", &(wm8350->wdt.pdev));
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return 0;
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err_irq:
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wm8350_irq_exit(wm8350);
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err:
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return ret;
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}
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EXPORT_SYMBOL_GPL(wm8350_device_init);
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void wm8350_device_exit(struct wm8350 *wm8350)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(wm8350->pmic.led); i++)
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platform_device_unregister(wm8350->pmic.led[i].pdev);
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for (i = 0; i < ARRAY_SIZE(wm8350->pmic.pdev); i++)
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platform_device_unregister(wm8350->pmic.pdev[i]);
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platform_device_unregister(wm8350->wdt.pdev);
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platform_device_unregister(wm8350->rtc.pdev);
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platform_device_unregister(wm8350->power.pdev);
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platform_device_unregister(wm8350->hwmon.pdev);
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platform_device_unregister(wm8350->gpio.pdev);
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platform_device_unregister(wm8350->codec.pdev);
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if (wm8350->irq_base)
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free_irq(wm8350->irq_base + WM8350_IRQ_AUXADC_DATARDY, wm8350);
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wm8350_irq_exit(wm8350);
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}
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EXPORT_SYMBOL_GPL(wm8350_device_exit);
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MODULE_DESCRIPTION("WM8350 AudioPlus PMIC core driver");
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MODULE_LICENSE("GPL");
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