mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-07 13:56:41 +07:00
7b0c03ecc4
This patch adds a new device-tree property that allows to
specify the dma protection control bits for the all of the
DMA controller's channel uniformly.
Setting the "correct" bits can have a huge impact on the
PPC460EX and APM82181 that use this DMA engine in combination
with a DesignWare' SATA-II core (sata_dwc_460ex driver).
In the OpenWrt Forum, the user takimata reported that:
|It seems your patch unleashed the full power of the SATA port.
|Where I was previously hitting a really hard limit at around
|82 MB/s for reading and 27 MB/s for writing, I am now getting this:
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|root@OpenWrt:/mnt# time dd if=/dev/zero of=tempfile bs=1M count=1024
|1024+0 records in
|1024+0 records out
|real 0m 13.65s
|user 0m 0.01s
|sys 0m 11.89s
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|root@OpenWrt:/mnt# time dd if=tempfile of=/dev/null bs=1M count=1024
|1024+0 records in
|1024+0 records out
|real 0m 8.41s
|user 0m 0.01s
|sys 0m 4.70s
|
|This means: 121 MB/s reading and 75 MB/s writing!
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|The drive is a WD Green WD10EARX taken from an older MBL Single.
|I repeated the test a few times with even larger files to rule out
|any caching, I'm still seeing the same great performance. OpenWrt is
|now completely on par with the original MBL firmware's performance.
Another user And.short reported:
|I can report that your fix worked! Boots up fine with two
|drives even with more partitions, and no more reboot on
|concurrent disk access!
A closer look into the sata_dwc_460ex code revealed that
the driver did initally set the correct protection control
bits. However, this feature was lost when the sata_dwc_460ex
driver was converted to the generic DMA driver framework.
BugLink: https://forum.openwrt.org/t/wd-mybook-live-duo-two-disks/16195/55
BugLink: https://forum.openwrt.org/t/wd-mybook-live-duo-two-disks/16195/50
Fixes: 8b3444852a
("sata_dwc_460ex: move to generic DMA driver")
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
357 lines
8.5 KiB
C
357 lines
8.5 KiB
C
/*
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* Platform driver for the Synopsys DesignWare DMA Controller
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*
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* Copyright (C) 2007-2008 Atmel Corporation
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* Copyright (C) 2010-2011 ST Microelectronics
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* Copyright (C) 2013 Intel Corporation
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*
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* Some parts of this driver are derived from the original dw_dmac.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/device.h>
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#include <linux/clk.h>
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#include <linux/pm_runtime.h>
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#include <linux/platform_device.h>
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#include <linux/dmaengine.h>
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#include <linux/dma-mapping.h>
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#include <linux/of.h>
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#include <linux/of_dma.h>
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#include <linux/acpi.h>
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#include <linux/acpi_dma.h>
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#include "internal.h"
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#define DRV_NAME "dw_dmac"
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static struct dma_chan *dw_dma_of_xlate(struct of_phandle_args *dma_spec,
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struct of_dma *ofdma)
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{
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struct dw_dma *dw = ofdma->of_dma_data;
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struct dw_dma_slave slave = {
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.dma_dev = dw->dma.dev,
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};
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dma_cap_mask_t cap;
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if (dma_spec->args_count != 3)
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return NULL;
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slave.src_id = dma_spec->args[0];
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slave.dst_id = dma_spec->args[0];
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slave.m_master = dma_spec->args[1];
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slave.p_master = dma_spec->args[2];
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if (WARN_ON(slave.src_id >= DW_DMA_MAX_NR_REQUESTS ||
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slave.dst_id >= DW_DMA_MAX_NR_REQUESTS ||
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slave.m_master >= dw->pdata->nr_masters ||
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slave.p_master >= dw->pdata->nr_masters))
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return NULL;
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dma_cap_zero(cap);
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dma_cap_set(DMA_SLAVE, cap);
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/* TODO: there should be a simpler way to do this */
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return dma_request_channel(cap, dw_dma_filter, &slave);
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}
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#ifdef CONFIG_ACPI
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static bool dw_dma_acpi_filter(struct dma_chan *chan, void *param)
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{
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struct acpi_dma_spec *dma_spec = param;
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struct dw_dma_slave slave = {
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.dma_dev = dma_spec->dev,
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.src_id = dma_spec->slave_id,
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.dst_id = dma_spec->slave_id,
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.m_master = 0,
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.p_master = 1,
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};
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return dw_dma_filter(chan, &slave);
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}
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static void dw_dma_acpi_controller_register(struct dw_dma *dw)
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{
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struct device *dev = dw->dma.dev;
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struct acpi_dma_filter_info *info;
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int ret;
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info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
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if (!info)
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return;
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dma_cap_zero(info->dma_cap);
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dma_cap_set(DMA_SLAVE, info->dma_cap);
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info->filter_fn = dw_dma_acpi_filter;
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ret = devm_acpi_dma_controller_register(dev, acpi_dma_simple_xlate,
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info);
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if (ret)
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dev_err(dev, "could not register acpi_dma_controller\n");
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}
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#else /* !CONFIG_ACPI */
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static inline void dw_dma_acpi_controller_register(struct dw_dma *dw) {}
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#endif /* !CONFIG_ACPI */
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#ifdef CONFIG_OF
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static struct dw_dma_platform_data *
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dw_dma_parse_dt(struct platform_device *pdev)
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{
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struct device_node *np = pdev->dev.of_node;
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struct dw_dma_platform_data *pdata;
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u32 tmp, arr[DW_DMA_MAX_NR_MASTERS], mb[DW_DMA_MAX_NR_CHANNELS];
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u32 nr_masters;
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u32 nr_channels;
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if (!np) {
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dev_err(&pdev->dev, "Missing DT data\n");
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return NULL;
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}
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if (of_property_read_u32(np, "dma-masters", &nr_masters))
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return NULL;
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if (nr_masters < 1 || nr_masters > DW_DMA_MAX_NR_MASTERS)
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return NULL;
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if (of_property_read_u32(np, "dma-channels", &nr_channels))
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return NULL;
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if (nr_channels > DW_DMA_MAX_NR_CHANNELS)
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return NULL;
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pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
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if (!pdata)
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return NULL;
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pdata->nr_masters = nr_masters;
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pdata->nr_channels = nr_channels;
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if (of_property_read_bool(np, "is_private"))
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pdata->is_private = true;
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/*
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* All known devices, which use DT for configuration, support
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* memory-to-memory transfers. So enable it by default.
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*/
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pdata->is_memcpy = true;
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if (!of_property_read_u32(np, "chan_allocation_order", &tmp))
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pdata->chan_allocation_order = (unsigned char)tmp;
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if (!of_property_read_u32(np, "chan_priority", &tmp))
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pdata->chan_priority = tmp;
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if (!of_property_read_u32(np, "block_size", &tmp))
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pdata->block_size = tmp;
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if (!of_property_read_u32_array(np, "data-width", arr, nr_masters)) {
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for (tmp = 0; tmp < nr_masters; tmp++)
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pdata->data_width[tmp] = arr[tmp];
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} else if (!of_property_read_u32_array(np, "data_width", arr, nr_masters)) {
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for (tmp = 0; tmp < nr_masters; tmp++)
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pdata->data_width[tmp] = BIT(arr[tmp] & 0x07);
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}
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if (!of_property_read_u32_array(np, "multi-block", mb, nr_channels)) {
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for (tmp = 0; tmp < nr_channels; tmp++)
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pdata->multi_block[tmp] = mb[tmp];
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} else {
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for (tmp = 0; tmp < nr_channels; tmp++)
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pdata->multi_block[tmp] = 1;
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}
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if (!of_property_read_u32(np, "snps,dma-protection-control", &tmp)) {
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if (tmp > CHAN_PROTCTL_MASK)
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return NULL;
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pdata->protctl = tmp;
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}
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return pdata;
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}
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#else
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static inline struct dw_dma_platform_data *
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dw_dma_parse_dt(struct platform_device *pdev)
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{
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return NULL;
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}
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#endif
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static int dw_probe(struct platform_device *pdev)
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{
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struct dw_dma_chip *chip;
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struct device *dev = &pdev->dev;
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struct resource *mem;
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const struct dw_dma_platform_data *pdata;
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int err;
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chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL);
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if (!chip)
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return -ENOMEM;
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chip->irq = platform_get_irq(pdev, 0);
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if (chip->irq < 0)
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return chip->irq;
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mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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chip->regs = devm_ioremap_resource(dev, mem);
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if (IS_ERR(chip->regs))
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return PTR_ERR(chip->regs);
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err = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
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if (err)
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return err;
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pdata = dev_get_platdata(dev);
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if (!pdata)
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pdata = dw_dma_parse_dt(pdev);
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chip->dev = dev;
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chip->id = pdev->id;
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chip->pdata = pdata;
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chip->clk = devm_clk_get(chip->dev, "hclk");
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if (IS_ERR(chip->clk))
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return PTR_ERR(chip->clk);
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err = clk_prepare_enable(chip->clk);
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if (err)
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return err;
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pm_runtime_enable(&pdev->dev);
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err = dw_dma_probe(chip);
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if (err)
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goto err_dw_dma_probe;
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platform_set_drvdata(pdev, chip);
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if (pdev->dev.of_node) {
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err = of_dma_controller_register(pdev->dev.of_node,
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dw_dma_of_xlate, chip->dw);
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if (err)
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dev_err(&pdev->dev,
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"could not register of_dma_controller\n");
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}
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if (ACPI_HANDLE(&pdev->dev))
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dw_dma_acpi_controller_register(chip->dw);
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return 0;
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err_dw_dma_probe:
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pm_runtime_disable(&pdev->dev);
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clk_disable_unprepare(chip->clk);
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return err;
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}
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static int dw_remove(struct platform_device *pdev)
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{
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struct dw_dma_chip *chip = platform_get_drvdata(pdev);
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if (pdev->dev.of_node)
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of_dma_controller_free(pdev->dev.of_node);
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dw_dma_remove(chip);
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pm_runtime_disable(&pdev->dev);
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clk_disable_unprepare(chip->clk);
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return 0;
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}
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static void dw_shutdown(struct platform_device *pdev)
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{
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struct dw_dma_chip *chip = platform_get_drvdata(pdev);
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/*
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* We have to call dw_dma_disable() to stop any ongoing transfer. On
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* some platforms we can't do that since DMA device is powered off.
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* Moreover we have no possibility to check if the platform is affected
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* or not. That's why we call pm_runtime_get_sync() / pm_runtime_put()
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* unconditionally. On the other hand we can't use
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* pm_runtime_suspended() because runtime PM framework is not fully
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* used by the driver.
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*/
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pm_runtime_get_sync(chip->dev);
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dw_dma_disable(chip);
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pm_runtime_put_sync_suspend(chip->dev);
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clk_disable_unprepare(chip->clk);
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}
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#ifdef CONFIG_OF
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static const struct of_device_id dw_dma_of_id_table[] = {
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{ .compatible = "snps,dma-spear1340" },
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{}
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};
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MODULE_DEVICE_TABLE(of, dw_dma_of_id_table);
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#endif
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#ifdef CONFIG_ACPI
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static const struct acpi_device_id dw_dma_acpi_id_table[] = {
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{ "INTL9C60", 0 },
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{ "80862286", 0 },
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{ "808622C0", 0 },
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{ }
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};
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MODULE_DEVICE_TABLE(acpi, dw_dma_acpi_id_table);
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#endif
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#ifdef CONFIG_PM_SLEEP
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static int dw_suspend_late(struct device *dev)
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{
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struct dw_dma_chip *chip = dev_get_drvdata(dev);
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dw_dma_disable(chip);
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clk_disable_unprepare(chip->clk);
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return 0;
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}
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static int dw_resume_early(struct device *dev)
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{
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struct dw_dma_chip *chip = dev_get_drvdata(dev);
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int ret;
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ret = clk_prepare_enable(chip->clk);
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if (ret)
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return ret;
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return dw_dma_enable(chip);
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}
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#endif /* CONFIG_PM_SLEEP */
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static const struct dev_pm_ops dw_dev_pm_ops = {
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SET_LATE_SYSTEM_SLEEP_PM_OPS(dw_suspend_late, dw_resume_early)
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};
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static struct platform_driver dw_driver = {
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.probe = dw_probe,
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.remove = dw_remove,
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.shutdown = dw_shutdown,
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.driver = {
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.name = DRV_NAME,
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.pm = &dw_dev_pm_ops,
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.of_match_table = of_match_ptr(dw_dma_of_id_table),
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.acpi_match_table = ACPI_PTR(dw_dma_acpi_id_table),
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},
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};
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static int __init dw_init(void)
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{
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return platform_driver_register(&dw_driver);
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}
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subsys_initcall(dw_init);
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static void __exit dw_exit(void)
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{
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platform_driver_unregister(&dw_driver);
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}
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module_exit(dw_exit);
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller platform driver");
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MODULE_ALIAS("platform:" DRV_NAME);
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