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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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921ebd8f2c
Despite RISC-V having a direct 'fence.i' instruction available to userspace (which we can't trap!), that's not actually viable when running on Linux because the kernel might schedule a process on another hart. There is no way for userspace to handle this without invoking the kernel (as it doesn't know the thread->hart mappings), so we've defined a RISC-V specific system call to flush the instruction cache. This patch adds both a system call and a VDSO entry. If possible, we'd like to avoid having the system call be considered part of the user-facing ABI and instead restrict that to the VDSO entry -- both just in general to avoid having additional user-visible ABI to maintain, and because we'd prefer that users just call the VDSO entry because there might be a better way to do this in the future (ie, one that doesn't require entering the kernel). Signed-off-by: Andrew Waterman <andrew@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
32 lines
837 B
ArmAsm
32 lines
837 B
ArmAsm
/*
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* Copyright (C) 2017 SiFive
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/linkage.h>
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#include <asm/unistd.h>
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#include <asm/vdso-syscalls.h>
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.text
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/* int __vdso_flush_icache(void *start, void *end, unsigned long flags); */
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ENTRY(__vdso_flush_icache)
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.cfi_startproc
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#ifdef CONFIG_SMP
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li a7, __NR_riscv_flush_icache
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ecall
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#else
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fence.i
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li a0, 0
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#endif
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ret
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.cfi_endproc
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ENDPROC(__vdso_flush_icache)
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