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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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36ca4ba4b9
This patch adds a cpufreq backend driver to enable frequency scaling on cell. Signed-off-by: Christian Krafft <krafft@de.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
249 lines
5.9 KiB
C
249 lines
5.9 KiB
C
/*
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* cpufreq driver for the cell processor
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*
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* (C) Copyright IBM Deutschland Entwicklung GmbH 2005
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*
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* Author: Christian Krafft <krafft@de.ibm.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/cpufreq.h>
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#include <linux/timer.h>
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#include <asm/hw_irq.h>
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#include <asm/io.h>
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#include <asm/processor.h>
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#include <asm/prom.h>
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#include <asm/time.h>
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#include "cbe_regs.h"
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static DEFINE_MUTEX(cbe_switch_mutex);
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/* the CBE supports an 8 step frequency scaling */
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static struct cpufreq_frequency_table cbe_freqs[] = {
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{1, 0},
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{2, 0},
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{3, 0},
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{4, 0},
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{5, 0},
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{6, 0},
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{8, 0},
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{10, 0},
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{0, CPUFREQ_TABLE_END},
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};
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/* to write to MIC register */
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static u64 MIC_Slow_Fast_Timer_table[] = {
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[0 ... 7] = 0x007fc00000000000ull,
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};
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/* more values for the MIC */
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static u64 MIC_Slow_Next_Timer_table[] = {
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0x0000240000000000ull,
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0x0000268000000000ull,
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0x000029C000000000ull,
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0x00002D0000000000ull,
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0x0000300000000000ull,
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0x0000334000000000ull,
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0x000039C000000000ull,
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0x00003FC000000000ull,
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};
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/*
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* hardware specific functions
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*/
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static int get_pmode(int cpu)
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{
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int ret;
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struct cbe_pmd_regs __iomem *pmd_regs;
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pmd_regs = cbe_get_cpu_pmd_regs(cpu);
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ret = in_be64(&pmd_regs->pmsr) & 0x07;
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return ret;
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}
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static int set_pmode(int cpu, unsigned int pmode)
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{
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struct cbe_pmd_regs __iomem *pmd_regs;
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struct cbe_mic_tm_regs __iomem *mic_tm_regs;
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u64 flags;
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u64 value;
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local_irq_save(flags);
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mic_tm_regs = cbe_get_cpu_mic_tm_regs(cpu);
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pmd_regs = cbe_get_cpu_pmd_regs(cpu);
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pr_debug("pm register is mapped at %p\n", &pmd_regs->pmcr);
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pr_debug("mic register is mapped at %p\n", &mic_tm_regs->slow_fast_timer_0);
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out_be64(&mic_tm_regs->slow_fast_timer_0, MIC_Slow_Fast_Timer_table[pmode]);
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out_be64(&mic_tm_regs->slow_fast_timer_1, MIC_Slow_Fast_Timer_table[pmode]);
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out_be64(&mic_tm_regs->slow_next_timer_0, MIC_Slow_Next_Timer_table[pmode]);
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out_be64(&mic_tm_regs->slow_next_timer_1, MIC_Slow_Next_Timer_table[pmode]);
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value = in_be64(&pmd_regs->pmcr);
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/* set bits to zero */
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value &= 0xFFFFFFFFFFFFFFF8ull;
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/* set bits to next pmode */
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value |= pmode;
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out_be64(&pmd_regs->pmcr, value);
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/* wait until new pmode appears in status register */
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value = in_be64(&pmd_regs->pmsr) & 0x07;
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while(value != pmode) {
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cpu_relax();
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value = in_be64(&pmd_regs->pmsr) & 0x07;
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}
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local_irq_restore(flags);
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return 0;
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}
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/*
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* cpufreq functions
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*/
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static int cbe_cpufreq_cpu_init (struct cpufreq_policy *policy)
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{
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u32 *max_freq;
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int i, cur_pmode;
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struct device_node *cpu;
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cpu = of_get_cpu_node(policy->cpu, NULL);
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if(!cpu)
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return -ENODEV;
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pr_debug("init cpufreq on CPU %d\n", policy->cpu);
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max_freq = (u32*) get_property(cpu, "clock-frequency", NULL);
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if(!max_freq)
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return -EINVAL;
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// we need the freq in kHz
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*max_freq /= 1000;
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pr_debug("max clock-frequency is at %u kHz\n", *max_freq);
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pr_debug("initializing frequency table\n");
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// initialize frequency table
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for (i=0; cbe_freqs[i].frequency!=CPUFREQ_TABLE_END; i++) {
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cbe_freqs[i].frequency = *max_freq / cbe_freqs[i].index;
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pr_debug("%d: %d\n", i, cbe_freqs[i].frequency);
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}
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policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
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/* if DEBUG is enabled set_pmode() measures the correct latency of a transition */
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policy->cpuinfo.transition_latency = 25000;
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cur_pmode = get_pmode(policy->cpu);
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pr_debug("current pmode is at %d\n",cur_pmode);
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policy->cur = cbe_freqs[cur_pmode].frequency;
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#ifdef CONFIG_SMP
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policy->cpus = cpu_sibling_map[policy->cpu];
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#endif
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cpufreq_frequency_table_get_attr (cbe_freqs, policy->cpu);
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/* this ensures that policy->cpuinfo_min and policy->cpuinfo_max are set correctly */
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return cpufreq_frequency_table_cpuinfo (policy, cbe_freqs);
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}
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static int cbe_cpufreq_cpu_exit(struct cpufreq_policy *policy)
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{
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cpufreq_frequency_table_put_attr(policy->cpu);
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return 0;
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}
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static int cbe_cpufreq_verify(struct cpufreq_policy *policy)
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{
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return cpufreq_frequency_table_verify(policy, cbe_freqs);
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}
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static int cbe_cpufreq_target(struct cpufreq_policy *policy, unsigned int target_freq,
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unsigned int relation)
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{
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int rc;
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struct cpufreq_freqs freqs;
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int cbe_pmode_new;
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cpufreq_frequency_table_target(policy,
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cbe_freqs,
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target_freq,
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relation,
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&cbe_pmode_new);
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freqs.old = policy->cur;
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freqs.new = cbe_freqs[cbe_pmode_new].frequency;
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freqs.cpu = policy->cpu;
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mutex_lock (&cbe_switch_mutex);
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cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
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pr_debug("setting frequency for cpu %d to %d kHz, 1/%d of max frequency\n",
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policy->cpu,
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cbe_freqs[cbe_pmode_new].frequency,
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cbe_freqs[cbe_pmode_new].index);
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rc = set_pmode(policy->cpu, cbe_pmode_new);
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cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
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mutex_unlock(&cbe_switch_mutex);
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return rc;
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}
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static struct cpufreq_driver cbe_cpufreq_driver = {
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.verify = cbe_cpufreq_verify,
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.target = cbe_cpufreq_target,
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.init = cbe_cpufreq_cpu_init,
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.exit = cbe_cpufreq_cpu_exit,
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.name = "cbe-cpufreq",
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.owner = THIS_MODULE,
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.flags = CPUFREQ_CONST_LOOPS,
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};
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/*
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* module init and destoy
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*/
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static int __init cbe_cpufreq_init(void)
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{
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return cpufreq_register_driver(&cbe_cpufreq_driver);
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}
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static void __exit cbe_cpufreq_exit(void)
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{
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cpufreq_unregister_driver(&cbe_cpufreq_driver);
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}
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module_init(cbe_cpufreq_init);
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module_exit(cbe_cpufreq_exit);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Christian Krafft <krafft@de.ibm.com>");
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