linux_dsm_epyc7002/drivers/gpu/drm/i915/gvt
Weinan Li 9212b13f28 drm/i915/gvt: only reset execlist state of one engine during VM engine reset
Only reset vgpu execlist state of the exact engine which gets reset
request from VM. After read context status from HWSP enabled, KMD will use
the saved CSB read pointer but not always read from MMIO. When one engine
reset happen, only the read pointer of this engine will be reset, in GVT-g
host side also need to align with this policy, otherwise VM may get wrong
CSB status after one engine reset compeleted.

v2: Split refine and fix patch, code refine(Zhenyu)
v3: Move active flag of vgpu scheduler into sched_data(Zhenyu)

Cc: Fred Gao <fred.gao@intel.com>
Cc: Zhi Wang <zhi.a.wang@intel.com>
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Weinan Li <weinan.z.li@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2018-02-06 11:41:16 -08:00
..
aperture_gm.c
cfg_space.c
cmd_parser.c Linux 4.15-rc8 2018-01-18 09:32:15 +10:00
cmd_parser.h
debug.h
debugfs.c
display.c drm/i915/gvt: cleanup usage for typed mmio reg vs. offset 2017-12-22 16:33:03 +08:00
display.h
dmabuf.c drm/i915/gvt: Keep obj->dma_buf link NULL during exporting 2018-02-01 07:31:58 -08:00
dmabuf.h
edid.c drm/i915/gvt: cleanup usage for typed mmio reg vs. offset 2017-12-22 16:33:03 +08:00
edid.h
execlist.c drm/i915/gvt: refine intel_vgpu_submission_ops as per engine ops 2018-02-06 11:40:59 -08:00
execlist.h
fb_decoder.c drm/i915/gvt: cleanup usage for typed mmio reg vs. offset 2017-12-22 16:33:03 +08:00
fb_decoder.h
firmware.c
gtt.c drm/i915/gvt: validate gfn before set shadow page entry 2018-02-01 07:30:45 -08:00
gtt.h drm/i915/gvt: move write protect handler out of mmio emulation function 2017-12-22 16:33:50 +08:00
gvt.c drm/i915/gvt: move write protect handler out of mmio emulation function 2017-12-22 16:33:50 +08:00
gvt.h drm/i915/gvt: refine intel_vgpu_submission_ops as per engine ops 2018-02-06 11:40:59 -08:00
handlers.c drm/i915/gvt: only reset execlist state of one engine during VM engine reset 2018-02-06 11:41:16 -08:00
hypercall.h drm/i915/gvt: validate gfn before set shadow page entry 2018-02-01 07:30:45 -08:00
interrupt.c
interrupt.h
kvmgt.c drm/i915/gvt: validate gfn before set shadow page entry 2018-02-01 07:30:45 -08:00
Makefile Merge tag 'gvt-next-2017-12-14' of https://github.com/intel/gvt-linux into drm-intel-next-queued 2017-12-14 10:57:41 -08:00
mmio_context.c drm/i915/gvt: Do not use I915_NUM_ENGINES to iterate over the mocs regs array 2018-02-01 07:31:07 -08:00
mmio_context.h
mmio.c drm/i915/gvt: move write protect handler out of mmio emulation function 2017-12-22 16:33:50 +08:00
mmio.h drm/i915/gvt: cleanup usage for typed mmio reg vs. offset 2017-12-22 16:33:03 +08:00
mpt.h drm/i915/gvt: validate gfn before set shadow page entry 2018-02-01 07:30:45 -08:00
opregion.c
reg.h
sched_policy.c drm/i915/gvt: only reset execlist state of one engine during VM engine reset 2018-02-06 11:41:16 -08:00
sched_policy.h
scheduler.c drm/i915/gvt: only reset execlist state of one engine during VM engine reset 2018-02-06 11:41:16 -08:00
scheduler.h drm/i915/gvt: refine intel_vgpu_submission_ops as per engine ops 2018-02-06 11:40:59 -08:00
trace_points.c
trace.h drm/i915/gvt: refine trace_render_mmio 2017-12-18 16:30:03 +08:00
vgpu.c drm/i915/gvt: refine intel_vgpu_submission_ops as per engine ops 2018-02-06 11:40:59 -08:00