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The Marvell Armada 7K/8K SoCs contains an hardware block called COMPHY that provides a number of shared PHYs used by various interfaces in the SoC: network, SATA, PCIe, etc. This Device Tree binding allows to describe this COMPHY hardware block. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: David S. Miller <davem@davemloft.net>
44 lines
1.1 KiB
Plaintext
44 lines
1.1 KiB
Plaintext
mvebu comphy driver
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-------------------
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A comphy controller can be found on Marvell Armada 7k/8k on the CP110. It
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provides a number of shared PHYs used by various interfaces (network, sata,
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usb, PCIe...).
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Required properties:
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- compatible: should be "marvell,comphy-cp110"
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- reg: should contain the comphy register location and length.
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- marvell,system-controller: should contain a phandle to the
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system controller node.
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- #address-cells: should be 1.
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- #size-cells: should be 0.
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A sub-node is required for each comphy lane provided by the comphy.
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Required properties (child nodes):
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- reg: comphy lane number.
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- #phy-cells : from the generic phy bindings, must be 1. Defines the
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input port to use for a given comphy lane.
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Example:
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cpm_comphy: phy@120000 {
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compatible = "marvell,comphy-cp110";
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reg = <0x120000 0x6000>;
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marvell,system-controller = <&cpm_syscon0>;
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#address-cells = <1>;
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#size-cells = <0>;
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cpm_comphy0: phy@0 {
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reg = <0>;
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#phy-cells = <1>;
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};
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cpm_comphy1: phy@1 {
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reg = <1>;
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#phy-cells = <1>;
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};
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};
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