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6c79d12e94
Add device tree bindings for display clock controller for Qualcomm Technology Inc's SDM845 SoCs. Signed-off-by: Taniya Das <tdas@codeaurora.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
20 lines
641 B
Plaintext
20 lines
641 B
Plaintext
Qualcomm Technologies, Inc. Display Clock Controller Binding
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Required properties :
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- compatible : shall contain "qcom,sdm845-dispcc"
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- reg : shall contain base register location and length.
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- #clock-cells : from common clock binding, shall contain 1.
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- #reset-cells : from common reset binding, shall contain 1.
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- #power-domain-cells : from generic power domain binding, shall contain 1.
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Example:
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dispcc: clock-controller@af00000 {
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compatible = "qcom,sdm845-dispcc";
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reg = <0xaf00000 0x100000>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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};
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