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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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3e82806b97
Pull drm updates from Dave Airlie:
"I Was Almost Tempted To Capitalise Every Word, but then I decided I
couldn't read it myself!
I've also got one pull request for the sti driver outstanding. It
relied on a commit in Greg's tree and I didn't find out in time, that
commit is in your tree now so I might send that along once this is
merged.
I also had the accidental misfortune to have access to a Skylake on my
desk for a few days, and I've had to encourage Intel to try harder,
which seems to be happening now.
Here is the main drm-next pull request for 4.4.
Highlights:
New driver:
vc4 driver for the Rasberry Pi VPU.
(From Eric Anholt at Broadcom.)
Core:
Atomic fbdev support
Atomic helpers for runtime pm
dp/aux i2c STATUS_UPDATE handling
struct_mutex usage cleanups.
Generic of probing support.
Documentation:
Kerneldoc for VGA switcheroo code.
Rename to gpu instead of drm to reflect scope.
i915:
Skylake GuC firmware fixes
HPD A support
VBT backlight fallbacks
Fastboot by default for some systems
FBC work
BXT/SKL workarounds
Skylake deeper sleep state fixes
amdgpu:
Enable GPU scheduler by default
New atombios opcodes
GPUVM debugging options
Stoney support.
Fencing cleanups.
radeon:
More efficient CS checking
nouveau:
gk20a instance memory handling improvements.
Improved PGOB detection and GK107 support
Kepler GDDR5 PLL statbility improvement
G8x/GT2xx reclock improvements
new userspace API compatiblity fixes.
virtio-gpu:
Add 3D support - qemu 2.5 has it merged for it's gtk backend.
msm:
Initial msm88896 (snapdragon 8200)
exynos:
HDMI cleanups
Enable mixer driver byt default
Add DECON-TV support
vmwgfx:
Move to using memremap + fixes.
rcar-du:
Add support for R8A7793/4 DU
armada:
Remove support for non-component mode
Improved plane handling
Power savings while in DPMS off.
tda998x:
Remove unused slave encoder support
Use more HDMI helpers
Fix EDID read handling
dwhdmi:
Interlace video mode support for ipu-v3/dw_hdmi
Hotplug state fixes
Audio driver integration
imx:
More color formats support.
tegra:
Minor fixes/improvements"
[ Merge fixup: remove unused variable 'dev' that had all uses removed in
commit 4e270f0880
: "drm/gem: Drop struct_mutex requirement from
drm_gem_mmap_obj" ]
* 'drm-next' of git://people.freedesktop.org/~airlied/linux: (764 commits)
drm/vmwgfx: Relax irq locking somewhat
drm/vmwgfx: Properly flush cursor updates and page-flips
drm/i915/skl: disable display side power well support for now
drm/i915: Extend DSL readout fix to BDW and SKL.
drm/i915: Do graphics device reset under forcewake
drm/i915: Skip fence installation for objects with rotated views (v4)
vga_switcheroo: Drop client power state VGA_SWITCHEROO_INIT
drm/amdgpu: group together common fence implementation
drm/amdgpu: remove AMDGPU_FENCE_OWNER_MOVE
drm/amdgpu: remove now unused fence functions
drm/amdgpu: fix fence fallback check
drm/amdgpu: fix stoping the scheduler timeout
drm/amdgpu: cleanup on error in amdgpu_cs_ioctl()
drm/i915: Fix locking around GuC firmware load
drm/amdgpu: update Fiji's Golden setting
drm/amdgpu: update Fiji's rev id
drm/amdgpu: extract common code in vi_common_early_init
drm/amd/scheduler: don't oops on failure to load
drm/amdgpu: don't oops on failure to load (v2)
drm/amdgpu: don't VT switch on suspend
...
93 lines
3.1 KiB
Plaintext
93 lines
3.1 KiB
Plaintext
* Renesas R-Car Display Unit (DU)
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Required Properties:
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- compatible: must be one of the following.
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- "renesas,du-r8a7779" for R8A7779 (R-Car H1) compatible DU
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- "renesas,du-r8a7790" for R8A7790 (R-Car H2) compatible DU
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- "renesas,du-r8a7791" for R8A7791 (R-Car M2-W) compatible DU
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- "renesas,du-r8a7793" for R8A7793 (R-Car M2-N) compatible DU
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- "renesas,du-r8a7794" for R8A7794 (R-Car E2) compatible DU
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- reg: A list of base address and length of each memory resource, one for
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each entry in the reg-names property.
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- reg-names: Name of the memory resources. The DU requires one memory
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resource for the DU core (named "du") and one memory resource for each
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LVDS encoder (named "lvds.x" with "x" being the LVDS controller numerical
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index).
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- interrupt-parent: phandle of the parent interrupt controller.
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- interrupts: Interrupt specifiers for the DU interrupts.
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- clocks: A list of phandles + clock-specifier pairs, one for each entry in
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the clock-names property.
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- clock-names: Name of the clocks. This property is model-dependent.
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- R8A7779 uses a single functional clock. The clock doesn't need to be
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named.
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- R8A779[0134] use one functional clock per channel and one clock per LVDS
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encoder (if available). The functional clocks must be named "du.x" with
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"x" being the channel numerical index. The LVDS clocks must be named
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"lvds.x" with "x" being the LVDS encoder numerical index.
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- In addition to the functional and encoder clocks, all DU versions also
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support externally supplied pixel clocks. Those clocks are optional.
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When supplied they must be named "dclkin.x" with "x" being the input
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clock numerical index.
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Required nodes:
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The connections to the DU output video ports are modeled using the OF graph
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bindings specified in Documentation/devicetree/bindings/graph.txt.
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The following table lists for each supported model the port number
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corresponding to each DU output.
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Port 0 Port1 Port2
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-----------------------------------------------------------------------------
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R8A7779 (H1) DPAD 0 DPAD 1 -
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R8A7790 (H2) DPAD LVDS 0 LVDS 1
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R8A7791 (M2-W) DPAD LVDS 0 -
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R8A7793 (M2-N) DPAD LVDS 0 -
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R8A7794 (E2) DPAD 0 DPAD 1 -
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Example: R8A7790 (R-Car H2) DU
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du: du@feb00000 {
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compatible = "renesas,du-r8a7790";
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reg = <0 0xfeb00000 0 0x70000>,
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<0 0xfeb90000 0 0x1c>,
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<0 0xfeb94000 0 0x1c>;
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reg-names = "du", "lvds.0", "lvds.1";
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interrupt-parent = <&gic>;
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interrupts = <0 256 IRQ_TYPE_LEVEL_HIGH>,
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<0 268 IRQ_TYPE_LEVEL_HIGH>,
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<0 269 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp7_clks R8A7790_CLK_DU0>,
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<&mstp7_clks R8A7790_CLK_DU1>,
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<&mstp7_clks R8A7790_CLK_DU2>,
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<&mstp7_clks R8A7790_CLK_LVDS0>,
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<&mstp7_clks R8A7790_CLK_LVDS1>;
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clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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du_out_rgb: endpoint {
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};
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};
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port@1 {
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reg = <1>;
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du_out_lvds0: endpoint {
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};
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};
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port@2 {
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reg = <2>;
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du_out_lvds1: endpoint {
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};
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};
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};
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};
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