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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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7466c52e17
The r8a7791 only has 2 CPU CA15 cores, not 4 CA15 and 4 CA7 cores. Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
66 lines
1.8 KiB
C
66 lines
1.8 KiB
C
/*
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* SMP support for r8a7791
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*
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* Copyright (C) 2013 Renesas Solutions Corp.
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* Copyright (C) 2013 Magnus Damm
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/smp.h>
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#include <linux/io.h>
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#include <asm/smp_plat.h>
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#include "common.h"
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#include "platsmp-apmu.h"
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#include "r8a7791.h"
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#include "rcar-gen2.h"
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static struct rcar_apmu_config r8a7791_apmu_config[] = {
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{
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.iomem = DEFINE_RES_MEM(0xe6152000, 0x88),
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.cpus = { 0, 1 },
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}
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};
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static void __init r8a7791_smp_prepare_cpus(unsigned int max_cpus)
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{
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/* let APMU code install data related to shmobile_boot_vector */
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shmobile_smp_apmu_prepare_cpus(max_cpus,
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r8a7791_apmu_config,
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ARRAY_SIZE(r8a7791_apmu_config));
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r8a7791_pm_init();
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}
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static int r8a7791_smp_boot_secondary(unsigned int cpu,
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struct task_struct *idle)
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{
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/* Error out when hardware debug mode is enabled */
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if (rcar_gen2_read_mode_pins() & BIT(21)) {
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pr_warn("Unable to boot CPU%u when MD21 is set\n", cpu);
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return -ENOTSUPP;
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}
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return shmobile_smp_apmu_boot_secondary(cpu, idle);
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}
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struct smp_operations r8a7791_smp_ops __initdata = {
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.smp_prepare_cpus = r8a7791_smp_prepare_cpus,
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.smp_boot_secondary = r8a7791_smp_boot_secondary,
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#ifdef CONFIG_HOTPLUG_CPU
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.cpu_disable = shmobile_smp_cpu_disable,
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.cpu_die = shmobile_smp_apmu_cpu_die,
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.cpu_kill = shmobile_smp_apmu_cpu_kill,
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#endif
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};
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