Laurent Pinchart 9144adc5e5 drm: rcar-du: Cache DSYSR value to ensure known initial value ... DSYSR is a DU channel register that also contains group fields. It is thus written to by both the group and CRTC code, using read-update-write sequences. As the register isn't initialized explicitly at startup time, this can lead to invalid or otherwise unexpected values being written to some of the fields if they have been modified by the firmware or just not reset properly. To fix this we can write a fully known value to the DSYSR register when turning a channel's functional clock on. However, the mix of group and channel fields complicate this. A simpler solution is to cache the register and initialize the cached value to the desired hardware defaults. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>		2018-09-25 00:41:04 +03:00
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drm	drm: rcar-du: Cache DSYSR value to ensure known initial value	2018-09-25 00:41:04 +03:00
host1x	gpu: host1x: Check whether size of unpin isn't 0	2018-07-09 10:31:30 +02:00
ipu-v3	drm pull for 4.19-rc1	2018-08-15 17:39:07 -07:00
vga	vga_switcheroo: set audio client id according to bound GPU id	2018-07-17 11:12:00 +02:00
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