Tomi Valkeinen 9109594def drm/bridge: tfp410: add pclk limits ... Add pixel clock limits to the driver as per TFP410 datasheet: min 25MHz, max 165MHz. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200121094655.9092-1-tomi.valkeinen@ti.com		2020-02-11 09:17:51 +02:00
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drm	drm/bridge: tfp410: add pclk limits	2020-02-11 09:17:51 +02:00
host1x	drm-misc-next for v5.6:	2019-12-17 13:57:54 +01:00
ipu-v3
vga
Makefile