mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
9e1b7498d7
Implement a custom reset function for the HDQ1W IP block. This is because the HDQ1W IP block, like I2C, has an internal clock gating bit that needs to be toggled after setting the SOFTRESET bit to allow the reset to propagate. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: NeilBrown <neilb@suse.de> Cc: Avinash.H.M <avinashhm@ti.com> Tested-by: NeilBrown <neilb@suse.de>
37 lines
1.1 KiB
C
37 lines
1.1 KiB
C
/*
|
|
* Shared macros and function prototypes for the HDQ1W/1-wire IP block
|
|
*
|
|
* Copyright (C) 2012 Texas Instruments, Inc.
|
|
* Paul Walmsley
|
|
*
|
|
* This program is free software; you can redistribute it and/or
|
|
* modify it under the terms of the GNU General Public License
|
|
* version 2 as published by the Free Software Foundation.
|
|
*
|
|
* This program is distributed in the hope that it will be useful, but
|
|
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
|
* General Public License for more details.
|
|
*
|
|
* You should have received a copy of the GNU General Public License
|
|
* along with this program; if not, write to the Free Software
|
|
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
|
|
* 02110-1301 USA
|
|
*/
|
|
#ifndef ARCH_ARM_MACH_OMAP2_HDQ1W_H
|
|
#define ARCH_ARM_MACH_OMAP2_HDQ1W_H
|
|
|
|
#include <plat/omap_hwmod.h>
|
|
|
|
/*
|
|
* XXX A future cleanup patch should modify
|
|
* drivers/w1/masters/omap_hdq.c to use these macros
|
|
*/
|
|
#define HDQ_CTRL_STATUS_OFFSET 0x0c
|
|
#define HDQ_CTRL_STATUS_CLOCKENABLE_SHIFT 5
|
|
|
|
|
|
extern int omap_hdq1w_reset(struct omap_hwmod *oh);
|
|
|
|
#endif
|