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c36e6ec904
Although all PG2.0 silicon may not support 1GHz OPP for the MPU, older Beaglebone Blacks may have PG2.0 silicon populated and these particular parts are guaranteed to support the OPP, so enable it for PG2.0 on am335x-boneblack only. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
108 lines
3.2 KiB
Plaintext
108 lines
3.2 KiB
Plaintext
/*
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* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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#include "am33xx.dtsi"
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#include "am335x-bone-common.dtsi"
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/ {
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model = "TI AM335x BeagleBone Black";
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compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
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};
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&ldo3_reg {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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&mmc1 {
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vmmc-supply = <&vmmcsd_fixed>;
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};
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&mmc2 {
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vmmc-supply = <&vmmcsd_fixed>;
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pinctrl-names = "default";
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pinctrl-0 = <&emmc_pins>;
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bus-width = <8>;
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status = "okay";
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};
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&cpu0_opp_table {
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/*
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* All PG 2.0 silicon may not support 1GHz but some of the early
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* BeagleBone Blacks have PG 2.0 silicon which is guaranteed
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* to support 1GHz OPP so enable it for PG 2.0 on this board.
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*/
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oppnitro@1000000000 {
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opp-supported-hw = <0x06 0x0100>;
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};
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};
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&am33xx_pinmux {
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nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins {
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pinctrl-single,pins = <
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AM33XX_IOPAD(0x9b0, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr0 */
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AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* lcd_data0.lcd_data0 */
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AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0) /* lcd_data1.lcd_data1 */
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AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0) /* lcd_data2.lcd_data2 */
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AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0) /* lcd_data3.lcd_data3 */
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AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0) /* lcd_data4.lcd_data4 */
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AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0) /* lcd_data5.lcd_data5 */
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AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0) /* lcd_data6.lcd_data6 */
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AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0) /* lcd_data7.lcd_data7 */
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AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0) /* lcd_data8.lcd_data8 */
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AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0) /* lcd_data9.lcd_data9 */
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AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0) /* lcd_data10.lcd_data10 */
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AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0) /* lcd_data11.lcd_data11 */
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AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0) /* lcd_data12.lcd_data12 */
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AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0) /* lcd_data13.lcd_data13 */
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AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0) /* lcd_data14.lcd_data14 */
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AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0) /* lcd_data15.lcd_data15 */
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AM33XX_IOPAD(0x8e0, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_vsync.lcd_vsync */
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AM33XX_IOPAD(0x8e4, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_hsync.lcd_hsync */
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AM33XX_IOPAD(0x8e8, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_pclk.lcd_pclk */
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AM33XX_IOPAD(0x8ec, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_ac_bias_en.lcd_ac_bias_en */
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>;
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};
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nxp_hdmi_bonelt_off_pins: nxp_hdmi_bonelt_off_pins {
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pinctrl-single,pins = <
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AM33XX_IOPAD(0x9b0, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr0 */
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>;
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};
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};
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&lcdc {
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status = "okay";
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port {
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lcdc_0: endpoint@0 {
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remote-endpoint = <&hdmi_0>;
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};
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};
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};
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&i2c0 {
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tda19988 {
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compatible = "nxp,tda998x";
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reg = <0x70>;
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pinctrl-names = "default", "off";
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pinctrl-0 = <&nxp_hdmi_bonelt_pins>;
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pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>;
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port {
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hdmi_0: endpoint@0 {
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remote-endpoint = <&lcdc_0>;
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};
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};
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};
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};
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&rtc {
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system-power-controller;
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};
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