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fe086a7bea
Legacy HP ia64 platforms currently cannot provide /proc/cpuinfo/physical_id due to legacy SAL/PAL implementations. However, that physical topology information can be obtained via ACPI. Provide an interface that gives ACPI one last chance to provide physical_id for these legacy platforms. This logic only comes into play iff: - ACPI actually provides slot information for the CPU - we lack a valid socket_id Otherwise, we don't do anything. Since x86 uses the ACPI processor driver as well, we provide a nop stub function for arch_fix_phys_package_id() in asm-x86/topology.h Signed-off-by: Alex Chiang <achiang@hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
222 lines
5.4 KiB
C
222 lines
5.4 KiB
C
/*
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* Written by: Matthew Dobson, IBM Corporation
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*
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* Copyright (C) 2002, IBM Corp.
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*
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* All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for more
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* details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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* Send feedback to <colpatch@us.ibm.com>
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*/
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#ifndef _ASM_X86_TOPOLOGY_H
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#define _ASM_X86_TOPOLOGY_H
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#ifdef CONFIG_NUMA
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#include <linux/cpumask.h>
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#include <asm/mpspec.h>
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/* Mappings between logical cpu number and node number */
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#ifdef CONFIG_X86_32
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extern int cpu_to_node_map[];
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#else
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/* Returns the number of the current Node. */
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#define numa_node_id() (early_cpu_to_node(raw_smp_processor_id()))
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#endif
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DECLARE_PER_CPU(int, x86_cpu_to_node_map);
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#ifdef CONFIG_SMP
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extern int x86_cpu_to_node_map_init[];
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extern void *x86_cpu_to_node_map_early_ptr;
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#else
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#define x86_cpu_to_node_map_early_ptr NULL
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#endif
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extern cpumask_t node_to_cpumask_map[];
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#define NUMA_NO_NODE (-1)
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/* Returns the number of the node containing CPU 'cpu' */
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#ifdef CONFIG_X86_32
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#define early_cpu_to_node(cpu) cpu_to_node(cpu)
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static inline int cpu_to_node(int cpu)
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{
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return cpu_to_node_map[cpu];
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}
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#else /* CONFIG_X86_64 */
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#ifdef CONFIG_SMP
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static inline int early_cpu_to_node(int cpu)
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{
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int *cpu_to_node_map = x86_cpu_to_node_map_early_ptr;
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if (cpu_to_node_map)
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return cpu_to_node_map[cpu];
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else if (per_cpu_offset(cpu))
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return per_cpu(x86_cpu_to_node_map, cpu);
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else
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return NUMA_NO_NODE;
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}
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#else
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#define early_cpu_to_node(cpu) cpu_to_node(cpu)
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#endif
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static inline int cpu_to_node(int cpu)
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{
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#ifdef CONFIG_DEBUG_PER_CPU_MAPS
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if (x86_cpu_to_node_map_early_ptr) {
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printk("KERN_NOTICE cpu_to_node(%d): usage too early!\n",
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(int)cpu);
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dump_stack();
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return ((int *)x86_cpu_to_node_map_early_ptr)[cpu];
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}
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#endif
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return per_cpu(x86_cpu_to_node_map, cpu);
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}
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#ifdef CONFIG_NUMA
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/* Returns a pointer to the cpumask of CPUs on Node 'node'. */
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#define node_to_cpumask_ptr(v, node) \
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cpumask_t *v = &(node_to_cpumask_map[node])
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#define node_to_cpumask_ptr_next(v, node) \
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v = &(node_to_cpumask_map[node])
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#endif
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#endif /* CONFIG_X86_64 */
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/*
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* Returns the number of the node containing Node 'node'. This
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* architecture is flat, so it is a pretty simple function!
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*/
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#define parent_node(node) (node)
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/* Returns a bitmask of CPUs on Node 'node'. */
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static inline cpumask_t node_to_cpumask(int node)
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{
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return node_to_cpumask_map[node];
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}
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/* Returns the number of the first CPU on Node 'node'. */
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static inline int node_to_first_cpu(int node)
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{
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cpumask_t mask = node_to_cpumask(node);
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return first_cpu(mask);
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}
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#define pcibus_to_node(bus) __pcibus_to_node(bus)
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#define pcibus_to_cpumask(bus) __pcibus_to_cpumask(bus)
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#ifdef CONFIG_X86_32
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extern unsigned long node_start_pfn[];
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extern unsigned long node_end_pfn[];
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extern unsigned long node_remap_size[];
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#define node_has_online_mem(nid) (node_start_pfn[nid] != node_end_pfn[nid])
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# ifdef CONFIG_X86_HT
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# define ENABLE_TOPO_DEFINES
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# endif
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# define SD_CACHE_NICE_TRIES 1
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# define SD_IDLE_IDX 1
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# define SD_NEWIDLE_IDX 2
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# define SD_FORKEXEC_IDX 0
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#else
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# ifdef CONFIG_SMP
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# define ENABLE_TOPO_DEFINES
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# endif
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# define SD_CACHE_NICE_TRIES 2
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# define SD_IDLE_IDX 2
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# define SD_NEWIDLE_IDX 2
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# define SD_FORKEXEC_IDX 1
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#endif
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/* sched_domains SD_NODE_INIT for NUMAQ machines */
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#define SD_NODE_INIT (struct sched_domain) { \
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.min_interval = 8, \
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.max_interval = 32, \
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.busy_factor = 32, \
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.imbalance_pct = 125, \
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.cache_nice_tries = SD_CACHE_NICE_TRIES, \
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.busy_idx = 3, \
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.idle_idx = SD_IDLE_IDX, \
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.newidle_idx = SD_NEWIDLE_IDX, \
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.wake_idx = 1, \
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.forkexec_idx = SD_FORKEXEC_IDX, \
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.flags = SD_LOAD_BALANCE \
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| SD_BALANCE_EXEC \
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| SD_BALANCE_FORK \
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| SD_SERIALIZE \
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| SD_WAKE_BALANCE, \
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.last_balance = jiffies, \
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.balance_interval = 1, \
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}
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#ifdef CONFIG_X86_64_ACPI_NUMA
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extern int __node_distance(int, int);
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#define node_distance(a, b) __node_distance(a, b)
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#endif
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#else /* CONFIG_NUMA */
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#endif
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#include <asm-generic/topology.h>
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extern cpumask_t cpu_coregroup_map(int cpu);
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#ifdef ENABLE_TOPO_DEFINES
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#define topology_physical_package_id(cpu) (cpu_data(cpu).phys_proc_id)
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#define topology_core_id(cpu) (cpu_data(cpu).cpu_core_id)
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#define topology_core_siblings(cpu) (per_cpu(cpu_core_map, cpu))
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#define topology_thread_siblings(cpu) (per_cpu(cpu_sibling_map, cpu))
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#endif
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static inline void arch_fix_phys_package_id(int num, u32 slot)
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{
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}
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struct pci_bus;
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void set_pci_bus_resources_arch_default(struct pci_bus *b);
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#ifdef CONFIG_SMP
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#define mc_capable() (boot_cpu_data.x86_max_cores > 1)
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#define smt_capable() (smp_num_siblings > 1)
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#endif
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#ifdef CONFIG_NUMA
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extern int get_mp_bus_to_node(int busnum);
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extern void set_mp_bus_to_node(int busnum, int node);
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#else
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static inline int get_mp_bus_to_node(int busnum)
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{
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return 0;
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}
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static inline void set_mp_bus_to_node(int busnum, int node)
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{
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}
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#endif
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#endif
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