mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-15 09:56:58 +07:00
5f464707c8
Since recent smpboot 32/64-bit merge, my dual Xeon with HT has been booting only 2 of its 4 cpus (when running an i386 kernel; but x86_64 is okay). J.A. Magallón reports the same. native_cpu_up: bad cpu 2 native_cpu_up: bad cpu 3 The mach-default cpu_present_to_apicid() was just returning cpu number (2, 3) instead of apicid (6, 7): looks like we now need the x86_64 code even for the i386 case. Comparing with other versions of cpu_present_to_apicid(), it seems a good idea to include an NR_CPUS test too, since cpu_present() doesn't include that; but that wasn't a problem here, and may no problem at all. Prior to that smpboot merge, my Xeon booted the two HT siblings on one physical first, then the two siblings on the other physical after - when i386, but alternated them when x86_64. Since the merge, the x86_64 sequence is unchanged, but the i386 sequence is now like x86_64. I prefer this consistency, and I prefer the new sequence: booting with maxcpus=2 then uses the independent physicals without HT sharing. Signed-off-by: Hugh Dickins <hugh@veritas.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> |
||
|---|---|---|
| .. | ||
| apm.h | ||
| do_timer.h | ||
| entry_arch.h | ||
| irq_vectors_limits.h | ||
| irq_vectors.h | ||
| mach_apic.h | ||
| mach_apicdef.h | ||
| mach_ipi.h | ||
| mach_mpparse.h | ||
| mach_mpspec.h | ||
| mach_timer.h | ||
| mach_traps.h | ||
| mach_wakecpu.h | ||
| pci-functions.h | ||
| setup_arch.h | ||
| smpboot_hooks.h | ||