mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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9465d9cc31
Pull timer updates from Thomas Gleixner: "The time/timekeeping/timer folks deliver with this update: - Fix a reintroduced signed/unsigned issue and cleanup the whole signed/unsigned mess in the timekeeping core so this wont happen accidentaly again. - Add a new trace clock based on boot time - Prevent injection of random sleep times when PM tracing abuses the RTC for storage - Make posix timers configurable for real tiny systems - Add tracepoints for the alarm timer subsystem so timer based suspend wakeups can be instrumented - The usual pile of fixes and updates to core and drivers" * 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (23 commits) timekeeping: Use mul_u64_u32_shr() instead of open coding it timekeeping: Get rid of pointless typecasts timekeeping: Make the conversion call chain consistently unsigned timekeeping_Force_unsigned_clocksource_to_nanoseconds_conversion alarmtimer: Add tracepoints for alarm timers trace: Update documentation for mono, mono_raw and boot clock trace: Add an option for boot clock as trace clock timekeeping: Add a fast and NMI safe boot clock timekeeping/clocksource_cyc2ns: Document intended range limitation timekeeping: Ignore the bogus sleep time if pm_trace is enabled selftests/timers: Fix spelling mistake "Asyncrhonous" -> "Asynchronous" clocksource/drivers/bcm2835_timer: Unmap region obtained by of_iomap clocksource/drivers/arm_arch_timer: Map frame with of_io_request_and_map() arm64: dts: rockchip: Arch counter doesn't tick in system suspend clocksource/drivers/arm_arch_timer: Don't assume clock runs in suspend posix-timers: Make them configurable posix_cpu_timers: Move the add_device_randomness() call to a proper place timer: Move sys_alarm from timer.c to itimer.c ptp_clock: Allow for it to be optional Kconfig: Regenerate *.c_shipped files after previous changes ...
101 lines
3.0 KiB
Plaintext
101 lines
3.0 KiB
Plaintext
#
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# Freescale device configuration
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#
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config NET_VENDOR_FREESCALE
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bool "Freescale devices"
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default y
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depends on FSL_SOC || QUICC_ENGINE || CPM1 || CPM2 || PPC_MPC512x || \
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M523x || M527x || M5272 || M528x || M520x || M532x || \
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ARCH_MXC || ARCH_MXS || (PPC_MPC52xx && PPC_BESTCOMM) || \
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ARCH_LAYERSCAPE || COMPILE_TEST
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---help---
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If you have a network (Ethernet) card belonging to this class, say Y.
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Note that the answer to this question doesn't directly affect the
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kernel: saying N will just cause the configurator to skip all
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the questions about Freescale devices. If you say Y, you will be
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asked for your specific card in the following questions.
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if NET_VENDOR_FREESCALE
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config FEC
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tristate "FEC ethernet controller (of ColdFire and some i.MX CPUs)"
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depends on (M523x || M527x || M5272 || M528x || M520x || M532x || \
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ARCH_MXC || SOC_IMX28)
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default ARCH_MXC || SOC_IMX28 if ARM
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select PHYLIB
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imply PTP_1588_CLOCK
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---help---
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Say Y here if you want to use the built-in 10/100 Fast ethernet
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controller on some Motorola ColdFire and Freescale i.MX processors.
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config FEC_MPC52xx
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tristate "FEC MPC52xx driver"
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depends on PPC_MPC52xx && PPC_BESTCOMM
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select CRC32
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select PHYLIB
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select PPC_BESTCOMM_FEC
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---help---
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This option enables support for the MPC5200's on-chip
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Fast Ethernet Controller
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If compiled as module, it will be called fec_mpc52xx.
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config FEC_MPC52xx_MDIO
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bool "FEC MPC52xx MDIO bus driver"
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depends on FEC_MPC52xx
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default y
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---help---
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The MPC5200's FEC can connect to the Ethernet either with
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an external MII PHY chip or 10 Mbps 7-wire interface
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(Motorola? industry standard).
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If your board uses an external PHY connected to FEC, enable this.
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If not sure, enable.
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If compiled as module, it will be called fec_mpc52xx_phy.
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source "drivers/net/ethernet/freescale/fs_enet/Kconfig"
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source "drivers/net/ethernet/freescale/fman/Kconfig"
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config FSL_PQ_MDIO
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tristate "Freescale PQ MDIO"
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select PHYLIB
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---help---
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This driver supports the MDIO bus used by the gianfar and UCC drivers.
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config FSL_XGMAC_MDIO
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tristate "Freescale XGMAC MDIO"
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select PHYLIB
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depends on OF
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select OF_MDIO
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---help---
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This driver supports the MDIO bus on the Fman 10G Ethernet MACs, and
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on the FMan mEMAC (which supports both Clauses 22 and 45)
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config UCC_GETH
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tristate "Freescale QE Gigabit Ethernet"
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depends on QUICC_ENGINE
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select FSL_PQ_MDIO
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select PHYLIB
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---help---
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This driver supports the Gigabit Ethernet mode of the QUICC Engine,
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which is available on some Freescale SOCs.
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config UGETH_TX_ON_DEMAND
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bool "Transmit on Demand support"
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depends on UCC_GETH
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config GIANFAR
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tristate "Gianfar Ethernet"
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depends on HAS_DMA
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select FSL_PQ_MDIO
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select PHYLIB
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select CRC32
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---help---
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This driver supports the Gigabit TSEC on the MPC83xx, MPC85xx,
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and MPC86xx family of chips, the eTSEC on LS1021A and the FEC
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on the 8540.
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source "drivers/net/ethernet/freescale/dpaa/Kconfig"
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endif # NET_VENDOR_FREESCALE
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