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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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89e1f7d4c6
Add PCI device support for VFIO. PCI devices expose regions for accessing config space, I/O port space, and MMIO areas of the device. PCI config access is virtualized in the kernel, allowing us to ensure the integrity of the system, by preventing various accesses while reducing duplicate support across various userspace drivers. I/O port supports read/write access while MMIO also supports mmap of sufficiently sized regions. Support for INTx, MSI, and MSI-X interrupts are provided using eventfds to userspace. Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
270 lines
5.1 KiB
C
270 lines
5.1 KiB
C
/*
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* VFIO PCI I/O Port & MMIO access
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*
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* Copyright (C) 2012 Red Hat, Inc. All rights reserved.
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* Author: Alex Williamson <alex.williamson@redhat.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Derived from original vfio:
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* Copyright 2010 Cisco Systems, Inc. All rights reserved.
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* Author: Tom Lyon, pugs@cisco.com
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*/
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#include <linux/fs.h>
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#include <linux/pci.h>
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#include <linux/uaccess.h>
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#include <linux/io.h>
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#include "vfio_pci_private.h"
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/* I/O Port BAR access */
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ssize_t vfio_pci_io_readwrite(struct vfio_pci_device *vdev, char __user *buf,
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size_t count, loff_t *ppos, bool iswrite)
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{
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struct pci_dev *pdev = vdev->pdev;
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loff_t pos = *ppos & VFIO_PCI_OFFSET_MASK;
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int bar = VFIO_PCI_OFFSET_TO_INDEX(*ppos);
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void __iomem *io;
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size_t done = 0;
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if (!pci_resource_start(pdev, bar))
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return -EINVAL;
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if (pos + count > pci_resource_len(pdev, bar))
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return -EINVAL;
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if (!vdev->barmap[bar]) {
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int ret;
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ret = pci_request_selected_regions(pdev, 1 << bar, "vfio");
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if (ret)
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return ret;
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vdev->barmap[bar] = pci_iomap(pdev, bar, 0);
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if (!vdev->barmap[bar]) {
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pci_release_selected_regions(pdev, 1 << bar);
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return -EINVAL;
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}
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}
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io = vdev->barmap[bar];
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while (count) {
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int filled;
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if (count >= 3 && !(pos % 4)) {
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__le32 val;
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if (iswrite) {
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if (copy_from_user(&val, buf, 4))
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return -EFAULT;
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iowrite32(le32_to_cpu(val), io + pos);
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} else {
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val = cpu_to_le32(ioread32(io + pos));
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if (copy_to_user(buf, &val, 4))
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return -EFAULT;
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}
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filled = 4;
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} else if ((pos % 2) == 0 && count >= 2) {
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__le16 val;
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if (iswrite) {
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if (copy_from_user(&val, buf, 2))
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return -EFAULT;
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iowrite16(le16_to_cpu(val), io + pos);
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} else {
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val = cpu_to_le16(ioread16(io + pos));
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if (copy_to_user(buf, &val, 2))
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return -EFAULT;
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}
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filled = 2;
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} else {
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u8 val;
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if (iswrite) {
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if (copy_from_user(&val, buf, 1))
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return -EFAULT;
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iowrite8(val, io + pos);
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} else {
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val = ioread8(io + pos);
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if (copy_to_user(buf, &val, 1))
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return -EFAULT;
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}
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filled = 1;
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}
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count -= filled;
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done += filled;
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buf += filled;
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pos += filled;
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}
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*ppos += done;
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return done;
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}
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/*
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* MMIO BAR access
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* We handle two excluded ranges here as well, if the user tries to read
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* the ROM beyond what PCI tells us is available or the MSI-X table region,
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* we return 0xFF and writes are dropped.
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*/
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ssize_t vfio_pci_mem_readwrite(struct vfio_pci_device *vdev, char __user *buf,
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size_t count, loff_t *ppos, bool iswrite)
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{
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struct pci_dev *pdev = vdev->pdev;
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loff_t pos = *ppos & VFIO_PCI_OFFSET_MASK;
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int bar = VFIO_PCI_OFFSET_TO_INDEX(*ppos);
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void __iomem *io;
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resource_size_t end;
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size_t done = 0;
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size_t x_start = 0, x_end = 0; /* excluded range */
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if (!pci_resource_start(pdev, bar))
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return -EINVAL;
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end = pci_resource_len(pdev, bar);
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if (pos > end)
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return -EINVAL;
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if (pos == end)
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return 0;
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if (pos + count > end)
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count = end - pos;
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if (bar == PCI_ROM_RESOURCE) {
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io = pci_map_rom(pdev, &x_start);
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x_end = end;
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} else {
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if (!vdev->barmap[bar]) {
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int ret;
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ret = pci_request_selected_regions(pdev, 1 << bar,
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"vfio");
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if (ret)
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return ret;
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vdev->barmap[bar] = pci_iomap(pdev, bar, 0);
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if (!vdev->barmap[bar]) {
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pci_release_selected_regions(pdev, 1 << bar);
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return -EINVAL;
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}
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}
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io = vdev->barmap[bar];
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if (bar == vdev->msix_bar) {
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x_start = vdev->msix_offset;
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x_end = vdev->msix_offset + vdev->msix_size;
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}
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}
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if (!io)
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return -EINVAL;
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while (count) {
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size_t fillable, filled;
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if (pos < x_start)
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fillable = x_start - pos;
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else if (pos >= x_end)
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fillable = end - pos;
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else
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fillable = 0;
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if (fillable >= 4 && !(pos % 4) && (count >= 4)) {
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__le32 val;
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if (iswrite) {
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if (copy_from_user(&val, buf, 4))
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goto out;
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iowrite32(le32_to_cpu(val), io + pos);
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} else {
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val = cpu_to_le32(ioread32(io + pos));
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if (copy_to_user(buf, &val, 4))
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goto out;
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}
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filled = 4;
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} else if (fillable >= 2 && !(pos % 2) && (count >= 2)) {
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__le16 val;
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if (iswrite) {
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if (copy_from_user(&val, buf, 2))
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goto out;
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iowrite16(le16_to_cpu(val), io + pos);
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} else {
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val = cpu_to_le16(ioread16(io + pos));
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if (copy_to_user(buf, &val, 2))
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goto out;
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}
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filled = 2;
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} else if (fillable) {
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u8 val;
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if (iswrite) {
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if (copy_from_user(&val, buf, 1))
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goto out;
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iowrite8(val, io + pos);
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} else {
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val = ioread8(io + pos);
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if (copy_to_user(buf, &val, 1))
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goto out;
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}
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filled = 1;
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} else {
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/* Drop writes, fill reads with FF */
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if (!iswrite) {
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char val = 0xFF;
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size_t i;
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for (i = 0; i < x_end - pos; i++) {
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if (put_user(val, buf + i))
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goto out;
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}
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}
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filled = x_end - pos;
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}
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count -= filled;
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done += filled;
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buf += filled;
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pos += filled;
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}
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*ppos += done;
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out:
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if (bar == PCI_ROM_RESOURCE)
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pci_unmap_rom(pdev, io);
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return count ? -EFAULT : done;
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}
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