Stephane Eranian 9010ae4a8d perf/x86/intel: Update event constraints when HT is off ... This patch updates the event constraints for non-PEBS mode for Intel Broadwell and Skylake processors. When HT is off, each CPU gets 8 generic counters. However, not all events can be programmed on any of the 8 counters. This patch adds the constraints for the MEM_* events which can only be measured on the bottom 4 counters. The constraints are also valid when HT is off because, then, there are only 4 generic counters and they are the bottom counters. Signed-off-by: Stephane Eranian <eranian@google.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Vince Weaver <vincent.weaver@maine.edu> Cc: kan.liang@intel.com Link: http://lkml.kernel.org/r/1467411742-13245-1-git-send-email-eranian@google.com Signed-off-by: Ingo Molnar <mingo@kernel.org>		2016-07-03 10:39:53 +02:00
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amd	Merge branch 'perf/urgent' into perf/core, to pick up fixes	2016-05-05 10:12:37 +02:00
intel	perf/x86/intel: Update event constraints when HT is off	2016-07-03 10:39:53 +02:00
core.c	perf/core improvements and fixes:	2016-05-20 08:20:14 +02:00
Kconfig	perf/x86: Move Kconfig.perf and other perf configuration bits to events/Kconfig	2016-03-31 10:30:40 +02:00
Makefile	x86/perf/intel/uncore: Make the Intel uncore PMU driver modular	2016-03-31 10:30:34 +02:00
msr.c	Merge branch 'perf/urgent' into perf/core, to pick up fixes	2016-05-12 10:14:45 +02:00
perf_event.h	perf/x86/intel/pt: Bypass PT vs. LBR exclusivity if the core supports it	2016-05-05 10:16:28 +02:00