AuxXxilium/linux_dsm_epyc7002
1
0
Fork 0
mirror of https://github.com/AuxXxilium/linux_dsm_epyc7002.git synced 2024-12-26 02:15:23 +07:00
Code Issues Actions Packages Projects Releases Wiki Activity
901045c3f0
linux_dsm_epyc7002/drivers/gpu/drm/i915/gt
History
Daniele Ceraolo Spurio 901045c3f0 drm/i915/huc: fix version parsing from CSS header 
The HuC FW has silently switched to encoding the version the same way as
the GuC FW does, i.e. major.minor.patch instead of just major.minor. All
the current blobs follow the new scheme, but since minor and patch are
both zero there is no difference in the end results and we happily load
them. New binaries, however, will have non-zero values in there, so we
need to make sure to parse them correctly.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Stuart Summers <stuart.summers@intel.com>
Acked-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190925222121.4000-1-daniele.ceraolospurio@intel.com
2019-09-27 10:20:20 -07:00
..
selftests drm/i915: Markup expected timeline locks for i915_active 2019-08-16 18:02:07 +01:00
uc drm/i915/huc: fix version parsing from CSS header 2019-09-27 10:20:20 -07:00
gen6_renderstate.c drm/i915: Move the renderstate setup under gt/ 2019-07-04 11:48:22 +01:00
gen7_renderstate.c drm/i915: Move the renderstate setup under gt/ 2019-07-04 11:48:22 +01:00
gen8_renderstate.c drm/i915: Move the renderstate setup under gt/ 2019-07-04 11:48:22 +01:00
gen9_renderstate.c drm/i915: Move the renderstate setup under gt/ 2019-07-04 11:48:22 +01:00
intel_breadcrumbs.c drm/i915: Don't disable interrupts for intel_engine_breadcrumbs_irq() 2019-09-26 18:44:35 +01:00
intel_context_types.h drm/i915/execlists: Lift process_csb() out of the irq-off spinlock 2019-08-16 20:59:02 +01:00
intel_context.c drm/i915: Mark i915_request.timeline as a volatile, rcu pointer 2019-09-20 10:24:09 +01:00
intel_context.h drm/i915/gt: Mark context->active_count as protected by timeline->mutex 2019-08-16 18:02:06 +01:00
intel_engine_cs.c drm/i915: Mark i915_request.timeline as a volatile, rcu pointer 2019-09-20 10:24:09 +01:00
intel_engine_pm.c drm/i915: Extract GT render sleep (rc6) management 2019-09-27 13:01:57 +01:00
intel_engine_pm.h drm/i915: Defer final intel_wakeref_put to process context 2019-08-08 21:28:51 +01:00
intel_engine_pool_types.h drm/i915: Replace struct_mutex for batch pool serialisation 2019-08-04 14:31:18 +01:00
intel_engine_pool.c drm/i915: Make engine's batch pool safe for use with virtual engines 2019-08-27 16:42:12 +01:00
intel_engine_pool.h drm/i915: Mark i915_request.timeline as a volatile, rcu pointer 2019-09-20 10:24:09 +01:00
intel_engine_types.h drm/i915: Use engine relative LRIs on context setup 2019-09-06 18:12:25 +01:00
intel_engine_user.c drm/i915: Fix up the inverse mapping for default ctx->engines[] 2019-08-08 15:45:35 +01:00
intel_engine_user.h drm/i915: Rename engines to match their user interface 2019-08-07 14:30:55 +01:00
intel_engine.h drm/i915: Don't disable interrupts for intel_engine_breadcrumbs_irq() 2019-09-26 18:44:35 +01:00
intel_gpu_commands.h drm/i915: Add definitions for MI_MATH command 2019-09-26 22:11:04 +01:00
intel_gt_irq.c drm/i915: Extract general GT interrupt handlers 2019-08-12 15:36:13 +01:00
intel_gt_irq.h drm/i915: Extract general GT interrupt handlers 2019-08-12 15:36:13 +01:00
intel_gt_pm_irq.c drm/i915: Extract general GT interrupt handlers 2019-08-12 15:36:13 +01:00
intel_gt_pm_irq.h drm/i915: Extract GT powermanagement interrupt handling 2019-08-12 15:36:06 +01:00
intel_gt_pm.c drm/i915: Extract GT render sleep (rc6) management 2019-09-27 13:01:57 +01:00
intel_gt_pm.h drm/i915: Extract GT render sleep (rc6) management 2019-09-27 13:01:57 +01:00
intel_gt_types.h drm/i915: Extract GT render sleep (rc6) management 2019-09-27 13:01:57 +01:00
intel_gt.c drm/i915: Extract GT render sleep (rc6) management 2019-09-27 13:01:57 +01:00
intel_gt.h drm/i915: Move GT init to intel_gt.c 2019-09-11 08:11:51 +01:00
intel_hangcheck.c drm/i915: Don't disable interrupts for intel_engine_breadcrumbs_irq() 2019-09-26 18:44:35 +01:00
intel_lrc_reg.h drm/i915/selftests: Verify the LRC register layout between init and HW 2019-09-24 17:27:19 +01:00
intel_lrc.c drm/i915/execlists: Use per-process HWSP as scratch 2019-09-26 18:44:35 +01:00
intel_lrc.h drm/i915/execlists: Use per-process HWSP as scratch 2019-09-26 18:44:35 +01:00
intel_mocs.c drm/i915/gt: Remove stale kerneldoc for internal MOCS functions 2019-08-05 18:27:17 +01:00
intel_mocs.h drm/i915: Move MOCS setup to intel_mocs.c 2019-07-31 07:40:35 -07:00
intel_rc6_types.h drm/i915: Extract GT render sleep (rc6) management 2019-09-27 13:01:57 +01:00
intel_rc6.c drm/i915: Extract GT render sleep (rc6) management 2019-09-27 13:01:57 +01:00
intel_rc6.h drm/i915: Extract GT render sleep (rc6) management 2019-09-27 13:01:57 +01:00
intel_renderstate.c drm/i915: Serialize against vma moves 2019-08-19 15:25:56 +01:00
intel_renderstate.h drm/i915: Move the renderstate setup under gt/ 2019-07-04 11:48:22 +01:00
intel_reset_types.h drm/i915: Define explicit wedged on init reset state 2019-09-26 18:44:35 +01:00
intel_reset.c drm/i915: Don't disable interrupts for intel_engine_breadcrumbs_irq() 2019-09-26 18:44:35 +01:00
intel_reset.h drm/i915: Define explicit wedged on init reset state 2019-09-26 18:44:35 +01:00
intel_ringbuffer.c drm/i915: Mark i915_request.timeline as a volatile, rcu pointer 2019-09-20 10:24:09 +01:00
intel_sseu.c drm/i915: Expand subslice mask 2019-08-23 19:14:27 +01:00
intel_sseu.h drm/i915/tgl: s/ss/eu fuse reading support 2019-09-21 08:31:08 +01:00
intel_timeline_types.h drm/i915: Mark i915_request.timeline as a volatile, rcu pointer 2019-09-20 10:24:09 +01:00
intel_timeline.c drm/i915: Protect timeline->hwsp dereferencing 2019-09-20 10:24:13 +01:00
intel_timeline.h drm/i915/gt: Track timeline activeness in enter/exit 2019-08-15 23:16:05 +01:00
intel_workarounds_types.h drm/i915: Add engine name to workaround debug print 2019-07-12 09:55:30 +01:00
intel_workarounds.c Revert "drm/i915/tgl: Implement Wa_1406941453" 2019-09-20 11:59:33 +01:00
intel_workarounds.h drm/i915: Convert gt workarounds to intel_gt 2019-06-21 13:48:25 +01:00
Makefile drm/i915: use upstream version of header tests 2019-07-30 12:11:57 +03:00
mock_engine.c drm/i915: Protect request retirement with timeline->mutex 2019-08-15 23:21:13 +01:00
mock_engine.h
selftest_context.c drm/i915: Mark i915_request.timeline as a volatile, rcu pointer 2019-09-20 10:24:09 +01:00
selftest_engine_cs.c drm/i915: Rename engines to match their user interface 2019-08-07 14:30:55 +01:00
selftest_engine_pm.c drm/i915: Defer final intel_wakeref_put to process context 2019-08-08 21:28:51 +01:00
selftest_engine.c drm/i915: Defer final intel_wakeref_put to process context 2019-08-08 21:28:51 +01:00
selftest_engine.h drm/i915: Defer final intel_wakeref_put to process context 2019-08-08 21:28:51 +01:00
selftest_gt_pm.c drm/i915: Extract GT render sleep (rc6) management 2019-09-27 13:01:57 +01:00
selftest_hangcheck.c drm/i915: Track ggtt fence reservations under its own mutex 2019-08-22 08:53:40 +01:00
selftest_lrc.c drm/i915/selftests: Verify the LRC register layout between init and HW 2019-09-24 17:27:19 +01:00
selftest_reset.c drm/i915/gt: Use intel_gt as the primary object for handling resets 2019-07-12 21:06:56 +01:00
selftest_timeline.c drm/i915: Markup expected timeline locks for i915_active 2019-08-16 18:02:07 +01:00
selftest_workarounds.c drm/i915/selftests: Add the usual batch vma managements to st_workarounds 2019-08-27 10:21:51 +01:00