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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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9f13a1fd45
frv, h8300, m68k, microblaze, openrisc, score, um and xtensa currently do not register a CPU device. Add the config option GENERIC_CPU_DEVICES which causes a generic CPU device to be registered for each present CPU, and make all these architectures select it. Richard Weinberger <richard@nod.at> covered UML and suggested using per_cpu. Signed-off-by: Ben Hutchings <ben@decadent.org.uk> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
376 lines
8.8 KiB
Plaintext
376 lines
8.8 KiB
Plaintext
config FRV
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bool
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default y
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select HAVE_IDE
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select HAVE_ARCH_TRACEHOOK
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select HAVE_IRQ_WORK
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select HAVE_PERF_EVENTS
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select HAVE_GENERIC_HARDIRQS
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select GENERIC_IRQ_SHOW
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select ARCH_HAVE_NMI_SAFE_CMPXCHG
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select GENERIC_CPU_DEVICES
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config ZONE_DMA
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bool
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default y
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config RWSEM_GENERIC_SPINLOCK
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bool
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default y
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config RWSEM_XCHGADD_ALGORITHM
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bool
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config GENERIC_HWEIGHT
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bool
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default y
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config GENERIC_CALIBRATE_DELAY
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bool
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default n
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config TIME_LOW_RES
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bool
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default y
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config QUICKLIST
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bool
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default y
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config ARCH_HAS_ILOG2_U32
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bool
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default y
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config ARCH_HAS_ILOG2_U64
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bool
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default y
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config HZ
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int
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default 1000
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source "init/Kconfig"
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source "kernel/Kconfig.freezer"
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menu "Fujitsu FR-V system setup"
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config MMU
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bool "MMU support"
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help
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This options switches on and off support for the FR-V MMU
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(effectively switching between vmlinux and uClinux). Not all FR-V
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CPUs support this. Currently only the FR451 has a sufficiently
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featured MMU.
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config FRV_OUTOFLINE_ATOMIC_OPS
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bool "Out-of-line the FRV atomic operations"
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default n
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help
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Setting this option causes the FR-V atomic operations to be mostly
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implemented out-of-line.
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See Documentation/frv/atomic-ops.txt for more information.
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config HIGHMEM
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bool "High memory support"
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depends on MMU
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default y
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help
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If you wish to use more than 256MB of memory with your MMU based
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system, you will need to select this option. The kernel can only see
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the memory between 0xC0000000 and 0xD0000000 directly... everything
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else must be kmapped.
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The arch is, however, capable of supporting up to 3GB of SDRAM.
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config HIGHPTE
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bool "Allocate page tables in highmem"
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depends on HIGHMEM
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default y
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help
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The VM uses one page of memory for each page table. For systems
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with a lot of RAM, this can be wasteful of precious low memory.
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Setting this option will put user-space page tables in high memory.
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source "mm/Kconfig"
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choice
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prompt "uClinux kernel load address"
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depends on !MMU
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default UCPAGE_OFFSET_C0000000
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help
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This option sets the base address for the uClinux kernel. The kernel
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will rearrange the SDRAM layout to start at this address, and move
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itself to start there. It must be greater than 0, and it must be
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sufficiently less than 0xE0000000 that the SDRAM does not intersect
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the I/O region.
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The base address must also be aligned such that the SDRAM controller
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can decode it. For instance, a 512MB SDRAM bank must be 512MB aligned.
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config UCPAGE_OFFSET_20000000
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bool "0x20000000"
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config UCPAGE_OFFSET_40000000
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bool "0x40000000"
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config UCPAGE_OFFSET_60000000
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bool "0x60000000"
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config UCPAGE_OFFSET_80000000
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bool "0x80000000"
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config UCPAGE_OFFSET_A0000000
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bool "0xA0000000"
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config UCPAGE_OFFSET_C0000000
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bool "0xC0000000 (Recommended)"
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endchoice
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config PAGE_OFFSET
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hex
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default 0x20000000 if UCPAGE_OFFSET_20000000
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default 0x40000000 if UCPAGE_OFFSET_40000000
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default 0x60000000 if UCPAGE_OFFSET_60000000
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default 0x80000000 if UCPAGE_OFFSET_80000000
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default 0xA0000000 if UCPAGE_OFFSET_A0000000
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default 0xC0000000
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config PROTECT_KERNEL
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bool "Protect core kernel against userspace"
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depends on !MMU
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default y
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help
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Selecting this option causes the uClinux kernel to change the
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permittivity of DAMPR register covering the core kernel image to
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prevent userspace accessing the underlying memory directly.
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choice
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prompt "CPU Caching mode"
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default FRV_DEFL_CACHE_WBACK
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help
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This option determines the default caching mode for the kernel.
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Write-Back caching mode involves the all reads and writes causing
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the affected cacheline to be read into the cache first before being
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operated upon. Memory is not then updated by a write until the cache
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is filled and a cacheline needs to be displaced from the cache to
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make room. Only at that point is it written back.
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Write-Behind caching is similar to Write-Back caching, except that a
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write won't fetch a cacheline into the cache if there isn't already
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one there; it will write directly to memory instead.
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Write-Through caching only fetches cachelines from memory on a
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read. Writes always get written directly to memory. If the affected
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cacheline is also in cache, it will be updated too.
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The final option is to turn of caching entirely.
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Note that not all CPUs support Write-Behind caching. If the CPU on
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which the kernel is running doesn't, it'll fall back to Write-Back
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caching.
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config FRV_DEFL_CACHE_WBACK
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bool "Write-Back"
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config FRV_DEFL_CACHE_WBEHIND
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bool "Write-Behind"
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config FRV_DEFL_CACHE_WTHRU
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bool "Write-Through"
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config FRV_DEFL_CACHE_DISABLED
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bool "Disabled"
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endchoice
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menu "CPU core support"
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config CPU_FR401
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bool "Include FR401 core support"
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depends on !MMU
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default y
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help
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This enables support for the FR401, FR401A and FR403 CPUs
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config CPU_FR405
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bool "Include FR405 core support"
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depends on !MMU
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default y
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help
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This enables support for the FR405 CPU
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config CPU_FR451
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bool "Include FR451 core support"
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default y
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help
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This enables support for the FR451 CPU
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config CPU_FR451_COMPILE
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bool "Specifically compile for FR451 core"
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depends on CPU_FR451 && !CPU_FR401 && !CPU_FR405 && !CPU_FR551
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default y
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help
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This causes appropriate flags to be passed to the compiler to
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optimise for the FR451 CPU
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config CPU_FR551
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bool "Include FR551 core support"
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depends on !MMU
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default y
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help
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This enables support for the FR555 CPU
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config CPU_FR551_COMPILE
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bool "Specifically compile for FR551 core"
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depends on CPU_FR551 && !CPU_FR401 && !CPU_FR405 && !CPU_FR451
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default y
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help
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This causes appropriate flags to be passed to the compiler to
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optimise for the FR555 CPU
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config FRV_L1_CACHE_SHIFT
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int
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default "5" if CPU_FR401 || CPU_FR405 || CPU_FR451
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default "6" if CPU_FR551
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endmenu
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choice
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prompt "System support"
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default MB93091_VDK
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config MB93091_VDK
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bool "MB93091 CPU board with or without motherboard"
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config MB93093_PDK
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bool "MB93093 PDK unit"
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endchoice
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if MB93091_VDK
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choice
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prompt "Motherboard support"
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default MB93090_MB00
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config MB93090_MB00
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bool "Use the MB93090-MB00 motherboard"
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help
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Select this option if the MB93091 CPU board is going to be used with
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a MB93090-MB00 VDK motherboard
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config MB93091_NO_MB
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bool "Use standalone"
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help
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Select this option if the MB93091 CPU board is going to be used
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without a motherboard
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endchoice
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endif
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config FUJITSU_MB93493
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bool "MB93493 Multimedia chip"
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help
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Select this option if the MB93493 multimedia chip is going to be
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used.
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choice
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prompt "GP-Relative data support"
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default GPREL_DATA_8
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help
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This option controls what data, if any, should be placed in the GP
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relative data sections. Using this means that the compiler can
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generate accesses to the data using GR16-relative addressing which
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is faster than absolute instructions and saves space (2 instructions
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per access).
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However, the GPREL region is limited in size because the immediate
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value used in the load and store instructions is limited to a 12-bit
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signed number.
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So if the linker starts complaining that accesses to GPREL data are
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out of range, try changing this option from the default.
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Note that modules will always be compiled with this feature disabled
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as the module data will not be in range of the GP base address.
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config GPREL_DATA_8
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bool "Put data objects of up to 8 bytes into GP-REL"
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config GPREL_DATA_4
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bool "Put data objects of up to 4 bytes into GP-REL"
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config GPREL_DATA_NONE
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bool "Don't use GP-REL"
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endchoice
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config FRV_ONCPU_SERIAL
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bool "Use on-CPU serial ports"
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select SERIAL_8250
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default y
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config PCI
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bool "Use PCI"
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depends on MB93090_MB00
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default y
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select GENERIC_PCI_IOMAP
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help
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Some FR-V systems (such as the MB93090-MB00 VDK) have PCI
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onboard. If you have one of these boards and you wish to use the PCI
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facilities, say Y here.
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config RESERVE_DMA_COHERENT
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bool "Reserve DMA coherent memory"
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depends on PCI && !MMU
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default y
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help
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Many PCI drivers require access to uncached memory for DMA device
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communications (such as is done with some Ethernet buffer rings). If
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a fully featured MMU is available, this can be done through page
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table settings, but if not, a region has to be set aside and marked
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with a special DAMPR register.
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Setting this option causes uClinux to set aside a portion of the
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available memory for use in this manner. The memory will then be
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unavailable for normal kernel use.
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source "drivers/pci/Kconfig"
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source "drivers/pcmcia/Kconfig"
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menu "Power management options"
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config ARCH_SUSPEND_POSSIBLE
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def_bool y
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source kernel/power/Kconfig
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endmenu
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endmenu
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menu "Executable formats"
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source "fs/Kconfig.binfmt"
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endmenu
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source "net/Kconfig"
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source "drivers/Kconfig"
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source "fs/Kconfig"
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source "arch/frv/Kconfig.debug"
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source "security/Kconfig"
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source "crypto/Kconfig"
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source "lib/Kconfig"
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